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Difference between revisions of "intel/mobile pentium ii/400"
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{{intel title|Mobile Pentium II 400}}
 
{{intel title|Mobile Pentium II 400}}
−
{{mpu
+
{{chip
 
| name                = Mobile Pentium II 400
 
| name                = Mobile Pentium II 400
 
| no image            = Yes
 
| no image            = Yes
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| s-spec 3            = SL3JW
 
| s-spec 3            = SL3JW
 
| s-spec es          =  
 
| s-spec es          =  
−
| s-spec qs          =  
+
| s-spec qs          = QB59
 +
| s-spec qs 2        = QB65
 +
| s-spec qs 3        = QC87
 
| cpuid              = 066Ah
 
| cpuid              = 066Ah
 
| cpuid 2            =  
 
| cpuid 2            =  
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 64 GB
+
| max memory          = 64 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 1.55
 
| v core              = 1.55
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The '''Mobile Pentium II 400''' is a {{arch|32}} [[x86]] microprocessor, part of the {{intel|Mobile Pentium II}} family, which operated at 400 MHz. This was the Pentium II Mobile family's highest performance processor. This processor had a TDP of 13.1 Watts. This chip was manufactured in [[250 nm process]] and includes a smaller 256 KB of [[L2$]] on-die. This is the only processor in the family to later be manufactured in [[180 nm]].
 
The '''Mobile Pentium II 400''' is a {{arch|32}} [[x86]] microprocessor, part of the {{intel|Mobile Pentium II}} family, which operated at 400 MHz. This was the Pentium II Mobile family's highest performance processor. This processor had a TDP of 13.1 Watts. This chip was manufactured in [[250 nm process]] and includes a smaller 256 KB of [[L2$]] on-die. This is the only processor in the family to later be manufactured in [[180 nm]].
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/p6#Memory_Hierarchy|l1=P6's Cache}}
+
{{main|intel/microarchitectures/p6#Memory_Hierarchy|l1=P6 § Cache}}
 
{{cache info
 
{{cache info
−
|l1i cache=16 KB
+
|l1i cache=16 KiB
−
|l1i break=1x16 KB
+
|l1i break=1x16 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
 
|l1i extra=
 
|l1i extra=
−
|l1d cache=16 KB
+
|l1d cache=16 KiB
−
|l1d break=1x16 KB
+
|l1d break=1x16 KiB
 
|l1d desc=4-way set associative
 
|l1d desc=4-way set associative
 
|l1d extra=
 
|l1d extra=
−
|l2 cache=256 KB
+
|l2 cache=256 KiB
−
|l2 break=1x256 KB
+
|l2 break=1x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
 
|l2 extra=(on-die)
 
|l2 extra=(on-die)
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== Features ==
 
== Features ==
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{{mpu features
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{{x86 features
 
| mmx        = Yes
 
| mmx        = Yes
 
}}
 
}}

Latest revision as of 15:25, 13 December 2017

Edit Values
Mobile Pentium II 400
General Info
DesignerIntel
ManufacturerIntel
Model Number400
Part NumberKP80524TX400256,
PMG40002002AA
S-SpecSL3BW, SL3EM, SL3JW
QB59 (QS), QB65 (QS), QC87 (QS)
MarketMobile
Introduction1999 (announced)
June 14, 1999 (launched)
ShopAmazon
General Specs
FamilyMobile Pentium II
LockedYes
Frequency400 MHz
Bus typeFSB
Bus speed66 MHz
Clock multiplier6
CPUID066Ah
Microarchitecture
MicroarchitectureP6
Core NameDixon
Core Family6
Core Model6
Core SteppingmqpA1, mqbA1, mdxA0
Process250 nm, 180 nm
Transistors27,400,000
TechnologyCMOS
Die180 mm²
Word Size32 bit
Cores1
Threads1
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.55
TDP13.1 W
OP Temperature-40 °C – 85 °C

The Mobile Pentium II 400 is a 32-bit x86 microprocessor, part of the Mobile Pentium II family, which operated at 400 MHz. This was the Pentium II Mobile family's highest performance processor. This processor had a TDP of 13.1 Watts. This chip was manufactured in 250 nm process and includes a smaller 256 KB of L2$ on-die. This is the only processor in the family to later be manufactured in 180 nm.

Cache[edit]

Main article: P6 § Cache
Cache Info [Edit Values]
L1I$ 16 KiB
16,384 B
0.0156 MiB
1x16 KiB 4-way set associative
L1D$ 16 KiB
16,384 B
0.0156 MiB
1x16 KiB 4-way set associative
L2$ 256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
1x256 KiB 4-way set associative (on-die)

Graphics[edit]

This processor has no integrated graphics processing unit.

Memory controller[edit]

This processor has no integrated memory controller.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/mobile_pentium_ii/400&oldid=70863"
Facts about "Mobile Pentium II 400 - Intel"
RDF feed
base frequency400 MHz (0.4 GHz, 400,000 kHz) +
bus speed66 MHz (0.066 GHz, 66,000 kHz) +
bus typeFSB +
clock multiplier6 +
core count1 +
core family6 +
core model6 +
core nameDixon +
core steppingmqpA1 +, mqbA1 + and mdxA0 +
core voltage1.55 V (15.5 dV, 155 cV, 1,550 mV) +
cpuid066Ah +
designerIntel +
die area180 mm² (0.279 in², 1.8 cm², 180,000,000 µm²) +
familyMobile Pentium II +
first announced1999 +
first launchedJune 14, 1999 +
full page nameintel/mobile pentium ii/400 +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1d$ description4-way set associative +
l1d$ size16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description4-way set associative +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
l2$ description4-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateJune 14, 1999 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max operating temperature85 °C +
microarchitectureP6 +
min operating temperature-40 °C +
model number400 +
nameMobile Pentium II 400 +
part numberKP80524TX400256 + and PMG40002002AA +
process250 nm (0.25 μm, 2.5e-4 mm) + and 180 nm (0.18 μm, 1.8e-4 mm) +
s-specSL3BW +, SL3EM + and SL3JW +
s-spec (qs)QB59 +, QB65 + and QC87 +
smp max ways1 +
tdp13.1 W (13,100 mW, 0.0176 hp, 0.0131 kW) +
technologyCMOS +
thread count1 +
transistor count27,400,000 +
word size32 bit (4 octets, 8 nibbles) +