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{{intel title|Core i5-6360U}}
 
{{intel title|Core i5-6360U}}
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{{chip
 
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|name=Core i5-6360U
 
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'''Core i5-6360U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 2.0 GHz with a {{intel|turbo boost}} of up to 3.1 GHz. The i5-6360U has a TDP of 15 W with a configurable-down TDP of 9.5 W. This chip incorporates the {{intel|Iris Graphics 540}} GPU operating at 300 MHz with a burst frequency of 1 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6360U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
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'''Core i5-6360U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 2.0 GHz with a {{intel|turbo boost}} of up to 3.1 GHz. The i5-6360U has a TDP of 15 W with a configurable TDP-down of 9.5 W. This chip incorporates the {{intel|Iris Graphics 540}} GPU operating at 300 MHz with a burst frequency of 1 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6360U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
  
 
== Cache ==
 
== Cache ==
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|l3 break=2x2 MiB
 
|l3 break=2x2 MiB
 
|l3 policy=write-back
 
|l3 policy=write-back
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|l4 cache=64 MiB
 
}}
 
}}
  
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== Graphics ==
 
== Graphics ==
−
The Iris Plus Graphics 540 includes 64 MiB of side eDRAM cache in addition to everything else.
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The Iris Graphics 540 includes 64 MiB of side eDRAM cache in addition to everything else.
 
{{integrated graphics
 
{{integrated graphics
−
| gpu                = Iris Plus Graphics 540
+
| gpu                = Iris Graphics 540
 
| device id          = 0x1926
 
| device id          = 0x1926
 
| designer            = Intel
 
| designer            = Intel
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|avx=Yes
 
|avx=Yes
 
|avx2=Yes
 
|avx2=Yes
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|avx512=No
+
 
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No

Latest revision as of 15:20, 13 December 2017

Edit Values
Core i5-6360U
skylake u (front; iris).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-6360U
Part NumberFJ8066202499208
S-SpecSR2JM
MarketMobile
IntroductionSeptember 1, 2015 (announced)
September 27, 2015 (launched)
Release Price$304.00
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-6000
LockedYes
Frequency2,000 MHz
Turbo Frequency3,100 MHz (1 core),
2,900 MHz (2 cores)
Bus typeOPI
Bus rate4 GT/s
Clock multiplier20
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
Core NameSkylake U
Core Family6
Core Model78
Core SteppingK1
Process14 nm
TechnologyCMOS
MCPYes (3 dies)
Word Size64 bit
Cores2
Threads4
Max Memory32 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP15 W
cTDP down9.5 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1356 (BGA)
Dimension42 mm x 24 mm x 1.3 mm
Pitch0.65 mm
Ball Count1356
Ball CompSAC405
InterconnectBGA-1356

Core i5-6360U is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 2.0 GHz with a turbo boost of up to 3.1 GHz. The i5-6360U has a TDP of 15 W with a configurable TDP-down of 9.5 W. This chip incorporates the Iris Graphics 540 GPU operating at 300 MHz with a burst frequency of 1 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6360U comes with an additional 64 MiB of embedded DRAM side cache.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB write-back
L4$64 MiB
65,536 KiB
67,108,864 B
0.0625 GiB
     

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2133, LPDDR3-1866, DDR3L-1600
Supports ECCNo
Max Mem32 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes12
Configs1x4, 2x2, 1x2+2x1, 4x1


Graphics[edit]

The Iris Graphics 540 includes 64 MiB of side eDRAM cache in addition to everything else.

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUIris Graphics 540
DesignerIntelDevice ID0x1926
Execution Units48Max Displays3
Max Memory32 GiB
32,768 MiB
33,554,432 KiB
34,359,738,368 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency1,000 MHz
1 GHz
1,000,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Flex MemoryFlex Memory Access
ISRTSmart Response Technology
MWTMy WiFi Technology
SIPPStable Image Platform Program
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-6360u&oldid=70640"
Facts about "Core i5-6360U - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i5-6360U - Intel#package + and Core i5-6360U - Intel#io +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
bus rate4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus typeOPI +
clock multiplier20 +
core count2 +
core family6 +
core model78 +
core nameSkylake U +
core steppingK1 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x1926 +
die count3 +
familyCore i5 +
first announcedSeptember 1, 2015 +
first launchedSeptember 27, 2015 +
full page nameintel/core i5/i5-6360u +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology +, Stable Image Platform Program + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel identity protection technology supporttrue +
has intel my wifi technology supporttrue +
has intel secure key technologytrue +
has intel smart response technology supporttrue +
has intel stable image platform program supporttrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuIris Graphics 540 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units48 +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
integrated gpu max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l4$ size64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) +
ldateSeptember 27, 2015 +
main imageFile:skylake u (front; iris).png +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes12 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi5-6360U +
nameCore i5-6360U +
packageFCBGA-1356 +
part numberFJ8066202499208 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 304.00 (€ 273.60, £ 246.24, ¥ 31,412.32) +
s-specSR2JM +
seriesi5-6000 +
smp max ways1 +
supported memory typeDDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down9.5 W (9,500 mW, 0.0127 hp, 0.0095 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
turbo frequency (2 cores)2,900 MHz (2.9 GHz, 2,900,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +