From WikiChip
Difference between revisions of "intel/core i3/i3-2390m"
(→Memory controller) |
m (Bot: moving all {{mpu}} to {{chip}}) |
||
(10 intermediate revisions by one other user not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Core i3-2390M}} | {{intel title|Core i3-2390M}} | ||
− | {{ | + | {{chip |
|name=Core i3-2390M | |name=Core i3-2390M | ||
|no image=Yes | |no image=Yes | ||
Line 11: | Line 11: | ||
|s-spec 2=SR0DM | |s-spec 2=SR0DM | ||
|market=Mobile | |market=Mobile | ||
+ | |first announced=2012 | ||
+ | |first launched=2012 | ||
|family=Core i3 | |family=Core i3 | ||
|series=i3-2000 | |series=i3-2000 | ||
Line 18: | Line 20: | ||
|bus links=4 | |bus links=4 | ||
|bus rate=5 GT/s | |bus rate=5 GT/s | ||
+ | |clock multiplier=25 | ||
|cpuid=0x206A7 | |cpuid=0x206A7 | ||
|isa=x86-64 | |isa=x86-64 | ||
Line 29: | Line 32: | ||
|core stepping=J1 | |core stepping=J1 | ||
|process=32 nm | |process=32 nm | ||
+ | |transistors=624,000,000 | ||
|technology=CMOS | |technology=CMOS | ||
+ | |die area=149 mm² | ||
|word size=64 bit | |word size=64 bit | ||
|core count=2 | |core count=2 | ||
Line 35: | Line 40: | ||
|max cpus=1 | |max cpus=1 | ||
|max memory=16 GiB | |max memory=16 GiB | ||
+ | |idle power=3.1 W | ||
|v core min=0.3 V | |v core min=0.3 V | ||
|v core max=1.52 V | |v core max=1.52 V | ||
Line 42: | Line 48: | ||
|tstorage min=-25 °C | |tstorage min=-25 °C | ||
|tstorage max=125 °C | |tstorage max=125 °C | ||
+ | |package module 1={{packages/intel/fcbga-1023}} | ||
}} | }} | ||
+ | '''Core i3-2390M''' is a [[dual-core]] entry-level performance mobile [[x86]] microprocessor introduced by [[Intel]] in [[2012]]. Fabricated on a [[32 nm process]] based on the {{intel|Sandy Bridge|l=arch}} microarchitecture, this processor operates at 2.5 GHz with a [[TDP]] of 35 Watts. The i3-2390M supports up to 16 GiB of dual-channel DDR3-1333 memory and incorporates Intel's {{intel|HD Graphics 3000}} [[integrated graphics]] operating at 650 MHz with a burst frequency of 1.15 GHz. | ||
== Cache == | == Cache == | ||
+ | {{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=128 KiB | ||
+ | |l1i cache=64 KiB | ||
+ | |l1i break=2x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=64 KiB | ||
+ | |l1d break=2x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=512 KiB | ||
+ | |l2 break=2x256 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=3 MiB | ||
+ | |l3 break=2x1.5 MiB | ||
+ | |l3 desc=12-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
== Memory controller == | == Memory controller == | ||
Line 70: | Line 97: | ||
|pcie config 3=1x8+2x4 | |pcie config 3=1x8+2x4 | ||
}} | }} | ||
+ | }} | ||
+ | == Wireless == | ||
+ | {{wireless links | ||
+ | |4g=yes | ||
+ | |wimax=yes | ||
}} | }} | ||
Line 107: | Line 139: | ||
== Features == | == Features == | ||
− | {{x86 features}} | + | {{x86 features |
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=No | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=No | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=Yes | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=Yes | ||
+ | |fastmem=Yes | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=Yes | ||
+ | |sipp=No | ||
+ | |att=Yes | ||
+ | |ipt=Yes | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=No | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | }} |
Latest revision as of 15:17, 13 December 2017
Edit Values | |||||||||
Core i3-2390M | |||||||||
General Info | |||||||||
Designer | Intel | ||||||||
Manufacturer | Intel | ||||||||
Model Number | i3-2390M | ||||||||
Part Number | AV8062700846906, AV8062700846907 | ||||||||
S-Spec | SR04M, SR0DM | ||||||||
Market | Mobile | ||||||||
Introduction | 2012 (announced) 2012 (launched) | ||||||||
Shop | Amazon | ||||||||
General Specs | |||||||||
Family | Core i3 | ||||||||
Series | i3-2000 | ||||||||
Locked | Yes | ||||||||
Frequency | 2,500 MHz | ||||||||
Bus type | DMI 2.0 | ||||||||
Bus rate | 4 × 5 GT/s | ||||||||
Clock multiplier | 25 | ||||||||
CPUID | 0x206A7 | ||||||||
Microarchitecture | |||||||||
ISA | x86-64 (x86) | ||||||||
Microarchitecture | Sandy Bridge | ||||||||
Platform | Sandy Bridge M | ||||||||
Chipset | Cougar Point | ||||||||
Core Name | Sandy Bridge M | ||||||||
Core Family | 6 | ||||||||
Core Model | 42 | ||||||||
Core Stepping | J1 | ||||||||
Process | 32 nm | ||||||||
Transistors | 624,000,000 | ||||||||
Technology | CMOS | ||||||||
Die | 149 mm² | ||||||||
Word Size | 64 bit | ||||||||
Cores | 2 | ||||||||
Threads | 4 | ||||||||
Max Memory | 16 GiB | ||||||||
Multiprocessing | |||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||
Electrical | |||||||||
Power (idle) | 3.1 W | ||||||||
Vcore | 0.3 V-1.52 V | ||||||||
TDP | 35 W | ||||||||
Tjunction | 0 °C – 100 °C | ||||||||
Tstorage | -25 °C – 125 °C | ||||||||
Packaging | |||||||||
|
Core i3-2390M is a dual-core entry-level performance mobile x86 microprocessor introduced by Intel in 2012. Fabricated on a 32 nm process based on the Sandy Bridge microarchitecture, this processor operates at 2.5 GHz with a TDP of 35 Watts. The i3-2390M supports up to 16 GiB of dual-channel DDR3-1333 memory and incorporates Intel's HD Graphics 3000 integrated graphics operating at 650 MHz with a burst frequency of 1.15 GHz.
Cache[edit]
- Main article: Sandy Bridge § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
Expansion Options |
|||||
|
Wireless[edit]
Wireless Communications | ||||
Cellular | ||||
4G |
|
---|
Graphics[edit]
Integrated Graphics Information
|
||||||||||||||||||||||||||||||||||||||||||||||||||
|
[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | ✘ | Main | Main, High | Up to 80 Mbps | |||
MPEG-4 AVC (H.264) | Main | 4.1 | Up to 40 Mbps | Main, High | 4.1 | Up to 40 Mbps | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | Up to 40 Mbps |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
Facts about "Core i3-2390M - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i3-2390M - Intel#pcie + |
device id | 0x116 + |
has ecc memory support | false + |
integrated gpu | HD Graphics 3000 + |
integrated gpu base frequency | 650 MHz (0.65 GHz, 650,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 1,150 MHz (1.15 GHz, 1,150,000 KHz) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
max memory bandwidth | 19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) + |
max memory channels | 2 + |
supported memory type | DDR3-1333 + and DDR3-1066 + |