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{{intel title|Atom Z510P}} | {{intel title|Atom Z510P}} | ||
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| name = Atom Z510P | | name = Atom Z510P | ||
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| model number = Z510P | | model number = Z510P | ||
| part number = CH80566EC005DW | | part number = CH80566EC005DW | ||
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| s-spec = SLGPQ | | s-spec = SLGPQ | ||
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Latest revision as of 16:14, 13 December 2017
Edit Values | |||||||||
Atom Z510P | |||||||||
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Silverthorne chip | |||||||||
General Info | |||||||||
Designer | Intel | ||||||||
Manufacturer | Intel | ||||||||
Model Number | Z510P | ||||||||
Part Number | CH80566EC005DW | ||||||||
S-Spec | SLGPQ | ||||||||
Market | Mobile | ||||||||
Introduction | March 2, 2009 (announced) March 2, 2009 (launched) | ||||||||
Shop | Amazon | ||||||||
General Specs | |||||||||
Family | Atom | ||||||||
Series | Z500 | ||||||||
Locked | Yes | ||||||||
Frequency | 1,100 MHz | ||||||||
Bus type | FSB | ||||||||
Bus speed | 100 MHz | ||||||||
Bus rate | 400 MT/s | ||||||||
Clock multiplier | 11 | ||||||||
CPUID | 106C2 | ||||||||
Microarchitecture | |||||||||
ISA | x86-32 (x86) | ||||||||
Microarchitecture | Bonnell | ||||||||
Platform | Menlow | ||||||||
Chipset | Poulsbo | ||||||||
Core Name | Silverthorne | ||||||||
Core Family | 6 | ||||||||
Core Model | 28 | ||||||||
Core Stepping | C0 | ||||||||
Process | 45 nm | ||||||||
Transistors | 47,212,207 | ||||||||
Technology | CMOS | ||||||||
Die | 24.18 mm² 7.8 mm × 3.1 mm | ||||||||
Word Size | 32 bit | ||||||||
Cores | 1 | ||||||||
Threads | 2 | ||||||||
Multiprocessing | |||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||
Electrical | |||||||||
Power dissipation (average) | 220 mW | ||||||||
Power (idle) | 100 mW | ||||||||
Vcore | 0.80 V-1.1 V | ||||||||
TDP | 2 W | ||||||||
Tjunction | 0 °C – 90 °C | ||||||||
Tcase | 0 °C – 70 °C | ||||||||
Tstorage | -40 °C – 85 °C | ||||||||
Packaging | |||||||||
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Z510P is an ultra-low power 32-bit x86 microprocessor introduced by Intel in early 2009 specifically for Mobile Internet Devices (MID). The Z510P, which is based on the Bonnell microarchitecture (Silverthorne core), is manufactured on a 45 nm process. This processor operates at 1.1 Ghz with a TDP of 2 W. The MPU features a legacy 400 MT/s front-side bus capable of communicating with the Poulsbo chipset in both low-power CMOS mode as well as normal GTL mode (which also works with other chipsets).
This model is identical to the Z510 but comes in a large package. This processor has a TDP of 2 W when Hyper-Threading is disabled and 2.2 W when enabled.
Cache[edit]
- Main article: Bonnell § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
This processor has no integrated memory controller.
Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Die Shot[edit]
- See also: Bonnell § Silverthorne Die
- 45 nm process
- 9 metal layers
- 47,212,207 transistors
- 3.1 mm x 7.8 mm
- 24.18 mm² die size
Documents[edit]
Datasheet[edit]
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Atom Z510P - Intel#package + |
base frequency | 1,100 MHz (1.1 GHz, 1,100,000 kHz) + |
bus rate | 400 MT/s (0.4 GT/s, 400,000 kT/s) + |
bus speed | 100 MHz (0.1 GHz, 100,000 kHz) + |
bus type | FSB + |
chipset | Poulsbo + |
clock multiplier | 11 + |
core count | 1 + |
core family | 6 + |
core model | 28 + |
core name | Silverthorne + |
core stepping | C0 + |
core voltage (max) | 1.1 V (11 dV, 110 cV, 1,100 mV) + |
core voltage (min) | 0.8 V (8 dV, 80 cV, 800 mV) + |
cpuid | 106C2 + |
designer | Intel + |
die area | 24.18 mm² (0.0375 in², 0.242 cm², 24,180,000 µm²) + |
die length | 7.8 mm (0.78 cm, 0.307 in, 7,800 µm) + |
die width | 3.1 mm (0.31 cm, 0.122 in, 3,100 µm) + |
family | Atom + |
first announced | March 2, 2009 + |
first launched | March 2, 2009 + |
full page name | intel/atom/z510p + |
has feature | Hyper-Threading Technology + and Enhanced SpeedStep Technology + |
has intel enhanced speedstep technology | true + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
instance of | microprocessor + |
isa | x86-32 + |
isa family | x86 + |
l1$ size | 56 KiB (57,344 B, 0.0547 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 24 KiB (24,576 B, 0.0234 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | March 2, 2009 + |
main image | ![]() |
main image caption | Silverthorne chip + |
manufacturer | Intel + |
market segment | Mobile + |
max case temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
max cpu count | 1 + |
max junction temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max storage temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
microarchitecture | Bonnell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | Z510P + |
name | Atom Z510P + |
package | FCBGA-437 + |
part number | CH80566EC005DW + |
platform | Menlow + |
power dissipation (average) | 0.22 W (220 mW, 2.9502e-4 hp, 2.2e-4 kW) + |
power dissipation (idle) | 0.1 W (100 mW, 1.341e-4 hp, 1.0e-4 kW) + |
process | 45 nm (0.045 μm, 4.5e-5 mm) + |
s-spec | SLGPQ + |
series | Z500 + |
smp max ways | 1 + |
socket | BGA-437 + |
tdp | 2 W (2,000 mW, 0.00268 hp, 0.002 kW) + |
technology | CMOS + |
thread count | 2 + |
transistor count | 47,212,207 + |
word size | 32 bit (4 octets, 8 nibbles) + |