From WikiChip
Difference between revisions of "intel/80486/486dx2-50"
< intel‎ | 80486

m (Bot: moving all {{mpu}} to {{chip}})
 
(12 intermediate revisions by 3 users not shown)
Line 1: Line 1:
 
{{intel title|i486DX2-50}}
 
{{intel title|i486DX2-50}}
−
{{mpu
+
{{chip
 
| name                = Intel i486DX2-50
 
| name                = Intel i486DX2-50
−
| no image            = Yes
+
| image              = Ic-photo-Intel--SB80486DX2-50--(486-CPU).JPG
−
| image              =  
 
 
| image size          =  
 
| image size          =  
−
| caption            =  
+
| caption            = SB80486DX2-50
 
| designer            = Intel
 
| designer            = Intel
 
| manufacturer        = Intel
 
| manufacturer        = Intel
Line 28: Line 27:
 
| bus rate            = 25 MT/s
 
| bus rate            = 25 MT/s
 
| clock multiplier    = 2
 
| clock multiplier    = 2
−
| s-spec              =  
+
| s-spec              = SX626
 +
| s-spec 2            = SX627
 +
| s-spec 3            = SX641
 +
| s-spec 4            = SX721
 +
| s-spec 5            = SX738
 +
| s-spec 6            = SX749
 +
| s-spec 7            = SX760
 +
| s-spec 8            = SX761
 +
| s-spec 9            = SX768
 +
| s-spec 10          = SX808
 +
| s-spec 11          = SX825
 +
| s-spec 12          = SX912
 +
| s-spec 13          = SX920
 +
| s-spec 14          = SX954
 
| s-spec es          =  
 
| s-spec es          =  
−
| s-spec qs          =  
+
| s-spec qs          = Q0382
−
| cpuid              =  
+
| s-spec qs 2        = Q0424
 +
| cpuid              = 432
 +
| cpuid 2            = 433
 +
| cpuid 3            = 435
 +
| cpuid 4            = 436
  
 
| microarch          = 80486
 
| microarch          = 80486
Line 48: Line 64:
 
| core count          = 1
 
| core count          = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
+
| max memory          = 4 GiB
  
−
| electrical          = Yes
+
 
−
| power              =  
+
| power              = 3.88 W
 
| v core              = 5 V
 
| v core              = 5 V
−
| v core tolerance    =  
+
| v core tolerance    = 5%
 
| temp max            = 85 °C
 
| temp max            = 85 °C
 
| temp min            = 0 °C
 
| temp min            = 0 °C
Line 69: Line 85:
 
| socket 3            = Socket 3
 
| socket 3            = Socket 3
 
}}
 
}}
 +
'''i486DX2-50''' was a fourth-generation [[x86]] [[microprocessor]] introduced by [[Intel]] in 1992. This chip, which is based on the {{intel|microarchitectures/80486|80486 microarchitecture}}, had a clock doubler operating at 50 MHz, twice the bus frequency. Like the original i486DX, this chip implemented the {{intel|80387}} [[FPU]] on-die and incorporated {{intel|System Management Mode}} (SMM).
 +
 +
== Cache ==
 +
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 +
{{cache info
 +
|l1 cache=8 KiB
 +
|l1 break=1x8 KiB
 +
|l1 desc=4-way set associative
 +
|l1 extra=(unified, write-through policy)
 +
}}
 +
 +
== Graphics ==
 +
This chip had no integrated graphics processing unit.
 +
 +
== Features ==
 +
* {{intel|System Management Mode}} (SMM)
 +
 +
== Gallery ==
 +
<gallery>
 +
File:Ic-photo-intel-A80486DX2-50-(486DX2).png|A80486DX2-50, S-Spec SX808
 +
File:Intel i486 DX2-50 MHz.jpg|A80486DX2-50, S-Spec SX641
 +
File:KL Intel i486DX2 PQFP.jpg|SB80486DX2-50, S-Spec SX920
 +
File:Sb80486dx2-50 sx825 observe.png|SB80486DX2-50, S-Spec SX825
 +
</gallery>
 +
 +
== See also ==
 +
* {{intel|80486|80486 family}}

Latest revision as of 15:13, 13 December 2017

Edit Values
Intel i486DX2-50
Ic-photo-Intel--SB80486DX2-50--(486-CPU).JPG
SB80486DX2-50
General Info
DesignerIntel
ManufacturerIntel
Model Numberi486DX2-50
Part NumberA80486DX2-50,
MA80486DX2-50,
MQ80486DX2-50,
TQ80486DX250,
SB80486DX2-50
S-SpecSX626, SX627, SX641, SX721, SX738, SX749, SX760, SX761, SX768, SX808, SX825, SX912, SX920, SX954
Q0382 (QS), Q0424 (QS)
IntroductionMarch 3, 1992 (launched)
ShopAmazon
General Specs
Family80486
Series486DX2
Frequency50 MHz
Bus typeFSB
Bus speed25 MHz
Bus rate25 MT/s
Clock multiplier2
CPUID432, 433, 435, 436
Microarchitecture
Microarchitecture80486
Core Name486DX2
Process1 µm, 800 nm
TechnologyCMOS
Word Size32 bit
Cores1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation3.88 W
Vcore5 V ± 5%
OP Temperature0 °C – 85 °C

i486DX2-50 was a fourth-generation x86 microprocessor introduced by Intel in 1992. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 50 MHz, twice the bus frequency. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).

Cache[edit]

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-through policy)

Graphics[edit]

This chip had no integrated graphics processing unit.

Features[edit]

Gallery[edit]

  • A80486DX2-50, S-Spec SX808

  • A80486DX2-50, S-Spec SX641

  • SB80486DX2-50, S-Spec SX920

  • SB80486DX2-50, S-Spec SX825

See also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/80486/486dx2-50&oldid=70363"
Facts about "i486DX2-50 - Intel"
RDF feed
base frequency50 MHz (0.05 GHz, 50,000 kHz) +
bus rate25 MT/s (0.025 GT/s, 25,000 kT/s) +
bus speed25 MHz (0.025 GHz, 25,000 kHz) +
bus typeFSB +
clock multiplier2 +
core count1 +
core name486DX2 +
core voltage5 V (50 dV, 500 cV, 5,000 mV) +
core voltage tolerance5% +
cpuid432 +, 433 +, 435 + and 436 +
designerIntel +
family80486 +
first launchedMarch 3, 1992 +
full page nameintel/80486/486dx2-50 +
instance ofmicroprocessor +
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +
ldateMarch 3, 1992 +
main imageFile:Ic-photo-Intel--SB80486DX2-50--(486-CPU).JPG +
main image captionSB80486DX2-50 +
manufacturerIntel +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature85 °C +
microarchitecture80486 +
min operating temperature0 °C +
model numberi486DX2-50 +
nameIntel i486DX2-50 +
part numberA80486DX2-50 +, MA80486DX2-50 +, MQ80486DX2-50 +, TQ80486DX250 + and SB80486DX2-50 +
power dissipation3.88 W (3,880 mW, 0.0052 hp, 0.00388 kW) +
process1,000 nm (1 μm, 0.001 mm) + and 800 nm (0.8 μm, 8.0e-4 mm) +
s-specSX626 +, SX627 +, SX641 +, SX721 +, SX738 +, SX749 +, SX760 +, SX761 +, SX768 +, SX808 +, SX825 +, SX912 +, SX920 + and SX954 +
s-spec (qs)Q0382 + and Q0424 +
series486DX2 +
smp max ways1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +