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Difference between revisions of "intel/80486/486dx-50"
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{{intel title|i486DX-50}} | {{intel title|i486DX-50}} | ||
− | {{ | + | {{chip |
| name = Intel i486DX-50 | | name = Intel i486DX-50 | ||
− | + | | image = CPU Intel 80486DX-50.JPG | |
− | | image = | ||
| image size = | | image size = | ||
− | | caption = | + | | caption = A80486DX-50, S-Spec SX710 |
| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
Line 24: | Line 23: | ||
| bus rate = 50 MT/s | | bus rate = 50 MT/s | ||
| clock multiplier = 1 | | clock multiplier = 1 | ||
− | | s-spec = | + | | s-spec = SX408 |
+ | | s-spec 2 = SX409 | ||
+ | | s-spec 3 = SX518 | ||
+ | | s-spec 4 = SX546 | ||
+ | | s-spec 5 = SX547 | ||
+ | | s-spec 6 = SX705 | ||
+ | | s-spec 7 = SX710 | ||
+ | | s-spec 8 = SXE69 | ||
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = Q0209 |
− | | cpuid = | + | | s-spec qs 2 = Q302 |
+ | | cpuid = 411 | ||
+ | | cpuid 2 = 413 | ||
| microarch = 80486 | | microarch = 80486 | ||
Line 44: | Line 52: | ||
| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
− | + | ||
− | | power = | + | | power = 4 W |
| v core = 5 V | | v core = 5 V | ||
− | | v core tolerance = | + | | v core tolerance = 5% |
| temp max = 85 °C | | temp max = 85 °C | ||
| temp min = 0 °C | | temp min = 0 °C | ||
Line 58: | Line 66: | ||
| package size = CPGA | | package size = CPGA | ||
| package 2 = PQFP-196 | | package 2 = PQFP-196 | ||
− | | package 2 | + | | package type 2 = PQFP |
| package 3 = SQFP-208 | | package 3 = SQFP-208 | ||
− | | package 3 | + | | package type 3 = SQFP |
| socket = Socket 1 | | socket = Socket 1 | ||
| socket 2 = Socket 2 | | socket 2 = Socket 2 | ||
| socket 3 = Socket 3 | | socket 3 = Socket 3 | ||
}} | }} | ||
+ | '''i486DX-50''' was a fourth-generation [[x86]] [[microprocessor]] introduced by [[Intel]] in 1991. This chip, which is based on the {{intel|microarchitectures/80486|80486 microarchitecture}}, operated at 50 MHz. This chip implemented the {{intel|80387}} [[FPU]] on-die and incorporated {{intel|System Management Mode}} (SMM). | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
+ | {{cache info | ||
+ | |l1 cache=8 KiB | ||
+ | |l1 break=1x8 KiB | ||
+ | |l1 desc=4-way set associative | ||
+ | |l1 extra=(unified, write-through policy) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This chip had no integrated graphics processing unit. | ||
+ | |||
+ | == Features == | ||
+ | * {{intel|System Management Mode}} (SMM) | ||
+ | |||
+ | == Gallery == | ||
+ | <gallery> | ||
+ | File:Intel i486 DX 50 CPU.jpg|A80486DX-50, S-Spec SX710 | ||
+ | File:Intel i486 dx 50mhz 2007 03 27.jpg|A80486DX-50, S-Spec SX546 | ||
+ | </gallery> | ||
+ | |||
+ | == See also == | ||
+ | * {{intel|80486|80486 family}} |
Latest revision as of 15:13, 13 December 2017
Edit Values | |
Intel i486DX-50 | |
A80486DX-50, S-Spec SX710 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i486DX-50 |
Part Number | A80486DX-50 |
S-Spec | SX408, SX409, SX518, SX546, SX547, SX705, SX710, SXE69 Q0209 (QS), Q302 (QS) |
Introduction | June 24, 1991 (launched) |
Shop | Amazon |
General Specs | |
Family | 80486 |
Series | 486DX |
Frequency | 50 MHz |
Bus type | FSB |
Bus speed | 50 MHz |
Bus rate | 50 MT/s |
Clock multiplier | 1 |
CPUID | 411, 413 |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486DX |
Process | 1 µm, 800 nm |
Transistors | 1,200,000 |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 4 W |
Vcore | 5 V ± 5% |
OP Temperature | 0 °C – 85 °C |
i486DX-50 was a fourth-generation x86 microprocessor introduced by Intel in 1991. This chip, which is based on the 80486 microarchitecture, operated at 50 MHz. This chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).
Contents
Cache[edit]
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- System Management Mode (SMM)
Gallery[edit]
See also[edit]
Facts about "i486DX-50 - Intel"
base frequency | 50 MHz (0.05 GHz, 50,000 kHz) + |
bus rate | 50 MT/s (0.05 GT/s, 50,000 kT/s) + |
bus speed | 50 MHz (0.05 GHz, 50,000 kHz) + |
bus type | FSB + |
clock multiplier | 1 + |
core count | 1 + |
core name | 486DX + |
core voltage | 5 V (50 dV, 500 cV, 5,000 mV) + |
core voltage tolerance | 5% + |
cpuid | 411 + and 413 + |
designer | Intel + |
family | 80486 + |
first launched | June 24, 1991 + |
full page name | intel/80486/486dx-50 + |
instance of | microprocessor + |
l1$ description | 4-way set associative + |
l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
ldate | June 24, 1991 + |
main image | + |
main image caption | A80486DX-50, S-Spec SX710 + |
manufacturer | Intel + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max operating temperature | 85 °C + |
microarchitecture | 80486 + |
min operating temperature | 0 °C + |
model number | i486DX-50 + |
name | Intel i486DX-50 + |
part number | A80486DX-50 + |
power dissipation | 4 W (4,000 mW, 0.00536 hp, 0.004 kW) + |
process | 1,000 nm (1 μm, 0.001 mm) + and 800 nm (0.8 μm, 8.0e-4 mm) + |
s-spec | SX408 +, SX409 +, SX518 +, SX546 +, SX547 +, SX705 +, SX710 + and SXE69 + |
s-spec (qs) | Q0209 + and Q302 + |
series | 486DX + |
smp max ways | 1 + |
technology | CMOS + |
transistor count | 1,200,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |