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Difference between revisions of "amd/k6-2/k6-2-500afx"
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{{amd title|K6-2/500AFX}}
 
{{amd title|K6-2/500AFX}}
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{{mpu
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{{chip
 
| name                = K6-2/500AFX
 
| name                = K6-2/500AFX
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| no image            = No
+
| no image            =  
−
| image              =  
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| image              = Ic-photo-AMD--AMD-K6-2 500AFX-(K6-2-CPU).png
 
| image size          =  
 
| image size          =  
−
| caption            =  
+
| caption            = Week 10, 2000
 
| designer            = AMD
 
| designer            = AMD
 
| manufacturer        = AMD
 
| manufacturer        = AMD
 
| model number        = K6-2/500AFX
 
| model number        = K6-2/500AFX
−
| part number        = K6-2/500AFX
+
| part number        = AMD-K6-2/500AFX
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| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = February 26, 1999
 
| first announced    = February 26, 1999
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
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| max memory          = 4 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              = 20.7 W
 
| power              = 20.7 W
 
| v core              = 2.2 V
 
| v core              = 2.2 V
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== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}}
 
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}}
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[[L2$]] can be 512 KB to 2 MB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip.
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[[L2$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip.
 
{{cache info
 
{{cache info
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|l1i cache=32 KB
+
|l1i cache=32 KiB
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|l1i break=1x32 KB
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|l1i break=1x32 KiB
 
|l1i desc=2-way set associative
 
|l1i desc=2-way set associative
 
|l1i extra=
 
|l1i extra=
−
|l1d cache=32 KB
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|l1d cache=32 KiB
−
|l1d break=1x32 KB
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|l1d break=1x32 KiB
 
|l1d desc=2-way set associative
 
|l1d desc=2-way set associative
 
|l1d extra=
 
|l1d extra=
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== Features ==
 
== Features ==
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{{mpu features
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{{x86 features
 
| mmx  = true
 
| mmx  = true
 
| 3dnow = true
 
| 3dnow = true
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* Auto-power down state
 
* Auto-power down state
 
* Stop clock state
 
* Stop clock state
 +
 +
== Gallery ==
 +
<gallery>
 +
AMD-K6-2-500EZ.jpg|
 +
</gallery>
 +
 +
== Documents ==
 +
 +
=== DataSheet ===
 +
* [[:File:AMD-K6-2 Processor Data Sheet (February, 2000).pdf|AMD-K6-2 Processor Data Sheet]]; Publication #21850 Revision J/0, February 2000

Latest revision as of 15:08, 13 December 2017

Edit Values
K6-2/500AFX
Ic-photo-AMD--AMD-K6-2 500AFX-(K6-2-CPU).png
Week 10, 2000
General Info
DesignerAMD
ManufacturerAMD
Model NumberK6-2/500AFX
Part NumberAMD-K6-2/500AFX
MarketDesktop
IntroductionFebruary 26, 1999 (announced)
March 11, 1999 (launched)
ShopAmazon
General Specs
FamilyK6-2
SeriesK6-2 Desktop
Frequency499.99 MHz
Bus typeFSB
Bus speed99.99 MHz
Bus rate99.99 MT/s
Clock multiplier5
CPUID58C
Microarchitecture
MicroarchitectureK6-2
PlatformSuper 7
Core NameChomper Extended
Core Family5
Core Model8
Core Stepping12
Process0.25 µm
Transistors9,300,000
TechnologyCMOS
Die81 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation20.7 W
Vcore2.2 V ± 0.1 V
VI/O3.3675 V ± 7%
Tcase0 °C – 65 °C
Tstorage-65 °C – 150 °C

K6-2/500AFX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 500 MHz with a FSB of 100 MHz consumed 20.7 W.

Cache[edit]

Main article: K6-2 § Cache

L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

  • Auto-power down state
  • Stop clock state

Gallery[edit]

  • AMD-K6-2-500EZ.jpg

Documents[edit]

DataSheet[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-2/k6-2-500afx&oldid=70061"
Facts about "K6-2/500AFX - AMD"
RDF feed
base frequency499.99 MHz (0.5 GHz, 499,990 kHz) +
bus rate99.99 MT/s (0.1 GT/s, 99,990 kT/s) +
bus speed99.99 MHz (0.1 GHz, 99,990 kHz) +
bus typeFSB +
clock multiplier5 +
core count1 +
core family5 +
core model8 +
core nameChomper Extended +
core stepping12 +
core voltage2.2 V (22 dV, 220 cV, 2,200 mV) +
core voltage tolerance0.1 V +
cpuid58C +
designerAMD +
die area81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
familyK6-2 +
first announcedFebruary 26, 1999 +
first launchedMarch 11, 1999 +
full page nameamd/k6-2/k6-2-500afx +
instance ofmicroprocessor +
io voltage3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) +
io voltage tolerance7% +
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
ldateMarch 11, 1999 +
main imageFile:Ic-photo-AMD--AMD-K6-2 500AFX-(K6-2-CPU).png +
main image captionWeek 10, 2000 +
manufacturerAMD +
market segmentDesktop +
max case temperature338.15 K (65 °C, 149 °F, 608.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature423.15 K (150 °C, 302 °F, 761.67 °R) +
microarchitectureK6-2 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature208.15 K (-65 °C, -85 °F, 374.67 °R) +
model numberK6-2/500AFX +
nameK6-2/500AFX +
part numberAMD-K6-2/500AFX +
platformSuper 7 +
power dissipation20.7 W (20,700 mW, 0.0278 hp, 0.0207 kW) +
process250 nm (0.25 μm, 2.5e-4 mm) +
seriesK6-2 Desktop +
smp max ways1 +
technologyCMOS +
thread count1 +
transistor count9,300,000 +
word size32 bit (4 octets, 8 nibbles) +