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Difference between revisions of "amd/k5/amd-ssa-5-75abr"
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{{amd title|AMD-SSA/5-75ABR}}
 
{{amd title|AMD-SSA/5-75ABR}}
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{{mpu
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{{chip
 
| name                = AMD-SSA/5-75ABR
 
| name                = AMD-SSA/5-75ABR
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| no image            = Yes
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| no image            =  
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| image              =  
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| image              = KL AMD 5k86 SSA5.jpg
 
| image size          =  
 
| image size          =  
 
| caption            =  
 
| caption            =  
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| model number        = AMD-SSA/5-75ABR
 
| model number        = AMD-SSA/5-75ABR
 
| part number        = AMD-SSA/5-75ABR
 
| part number        = AMD-SSA/5-75ABR
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| part number 1       =  
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| part number 2       =  
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = 1996
 
| first announced    = 1996
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
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| max memory          = 4 GB
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| max memory          = 4 GiB
 
| max memory addr    = 0xFFFFFFFF
 
| max memory addr    = 0xFFFFFFFF
  
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| electrical          = Yes
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| power              =  
 
| power              =  
 
| v core              = 3.525 V
 
| v core              = 3.525 V
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== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k5#Memory_Hierarchy|l1=K5 § Cache}}
 
{{main|amd/microarchitectures/k5#Memory_Hierarchy|l1=K5 § Cache}}
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{{cache info
 
{{cache info
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|l1i cache=16 KB
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|l1i cache=16 KiB
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|l1i break=1x16 KB
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|l1i break=1x16 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
 
|l1i extra=
 
|l1i extra=
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|l1d cache=8 KB
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|l1d cache=8 KiB
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|l1d break=1x8 KB
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|l1d break=1x8 KiB
 
|l1d desc=4-way set associative
 
|l1d desc=4-way set associative
 
|l1d extra=
 
|l1d extra=
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== Features ==  
 
== Features ==  
 +
* [[processor p-rating::P75]] [[P-Rating]]
 
* Auto-power down state
 
* Auto-power down state
 
* Stop clock state
 
* Stop clock state
 +
 +
== Gallery ==
 +
<gallery>
 +
File:Die amd 5k86-P75 SSA5-75BR.jpg|Chip de-capped
 +
File:Ic-photo-AMD--AMD-SSA 5-75ABR-(AMD5k86-P75-CPU).png
 +
</gallery>
  
 
== See also ==
 
== See also ==
 
* {{amd|K5}}
 
* {{amd|K5}}

Latest revision as of 15:08, 13 December 2017

Edit Values
AMD-SSA/5-75ABR
KL AMD 5k86 SSA5.jpg
General Info
DesignerAMD
ManufacturerAMD
Model NumberAMD-SSA/5-75ABR
Part NumberAMD-SSA/5-75ABR
MarketDesktop
Introduction1996 (announced)
March 27, 1996 (launched)
ShopAmazon
General Specs
FamilyK5
SeriesSSA/5
Frequency75 MHz
Bus typeFSB
Bus speed50 MHz
Bus rate50 MT/s
Clock multiplier1.5
CPUID500
Microarchitecture
MicroarchitectureK5
Core NameSSA/5
Core Family5
Core Model0
Core Stepping0
Process500 nm
Transistors4,300,000
TechnologyCMOS
Die251 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Max Address Mem0xFFFFFFFF
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore3.525 V ± 2%
Tcase0 °C – 70 °C
Tstorage-65°C – 150 °C

AMD-SSA/5-75ABR was a 32-bit x86 microprocessor developed by AMD and released in 1996. This processor was the first of AMD's brand new K5 microarchitecture designed entirely in-house. The chip operated at 75 MHz.

Cache[edit]

Main article: K5 § Cache
Cache Info [Edit Values]
L1I$ 16 KiB
16,384 B
0.0156 MiB
1x16 KiB 4-way set associative
L1D$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

  • P75 P-Rating
  • Auto-power down state
  • Stop clock state

Gallery[edit]

  • Chip de-capped

  • Ic-photo-AMD--AMD-SSA 5-75ABR-(AMD5k86-P75-CPU).png

See also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k5/amd-ssa-5-75abr&oldid=70005"
Facts about "AMD-SSA/5-75ABR - AMD"
RDF feed
base frequency75 MHz (0.075 GHz, 75,000 kHz) +
bus rate50 MT/s (0.05 GT/s, 50,000 kT/s) +
bus speed50 MHz (0.05 GHz, 50,000 kHz) +
bus typeFSB +
clock multiplier1.5 +
core count1 +
core family5 +
core model0 +
core nameSSA/5 +
core stepping0 +
core voltage3.525 V (35.25 dV, 352.5 cV, 3,525 mV) +
core voltage tolerance2% +
cpuid500 +
designerAMD +
die area251 mm² (0.389 in², 2.51 cm², 251,000,000 µm²) +
familyK5 +
first announced1996 +
first launchedMarch 27, 1996 +
full page nameamd/k5/amd-ssa-5-75abr +
instance ofmicroprocessor +
l1d$ description4-way set associative +
l1d$ size8 KiB (8,192 B, 0.00781 MiB) +
l1i$ description4-way set associative +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
ldateMarch 27, 1996 +
main imageFile:KL AMD 5k86 SSA5.jpg +
manufacturerAMD +
market segmentDesktop +
max case temperature343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory address0xFFFFFFFF +
max storage temperature423.15 K (150 °C, 302 °F, 761.67 °R) +
microarchitectureK5 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature208.15 K (-65 °C, -85 °F, 374.67 °R) +
model numberAMD-SSA/5-75ABR +
nameAMD-SSA/5-75ABR +
part numberAMD-SSA/5-75ABR +
process500 nm (0.5 μm, 5.0e-4 mm) +
processor p-ratingP75 +
seriesSSA/5 +
smp max ways1 +
technologyCMOS +
thread count1 +
transistor count4,300,000 +
word size32 bit (4 octets, 8 nibbles) +