From WikiChip
Difference between revisions of "amd/duron/dhd1600dlv1c"
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Revision as of 14:21, 13 December 2017

Edit Values
Duron 1600
KL AMD Duron Applebred.jpg
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 1600
Part NumberDHD1600DLV1C
MarketDesktop
IntroductionAugust 15, 2003 (announced)
August 15, 2003 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency1600 MHz
Bus typeFSB
Bus speed133.33 MHz
Bus rate266.66 MT/s
Clock multiplier12
CPUID680
Microarchitecture
MicroarchitectureK7
Core NameApplebred
Core Family6
Core Model8
Core Stepping0, 1, 2
Process130 nm
Transistors37,200,000
TechnologyCMOS
Die80.89 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.5 V ± 0.1 V
TDP57 W
Tcase0 °C – 85 °C
Tstorage-40 °C – 100 °C

The Duron 1600 based on the Applebred core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2003. This model was part of the third generation of the Duron family. Designed based on AMD's K7 and manufactured using their newer 130 nm process, this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:chip features

  • Halt State
  • Sleep State

Documents

DataSheet

Gallery

See also

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +