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Difference between revisions of "amd/am486/am486dx4-100v8t"
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{{amd title|Am486DX4-100V8T}} | {{amd title|Am486DX4-100V8T}} | ||
− | {{ | + | {{chip |
| name = Am486DX4-100V8T | | name = Am486DX4-100V8T | ||
− | |||
| image = | | image = | ||
| image size = | | image size = | ||
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| model number = Am486DX4-100V8T | | model number = Am486DX4-100V8T | ||
| part number = A80486DX4-100V8T | | part number = A80486DX4-100V8T | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = | ||
Line 25: | Line 24: | ||
| bus type = FSB | | bus type = FSB | ||
| bus speed = 33 MHz | | bus speed = 33 MHz | ||
− | | bus rate = | + | | bus rate = 33 MT/s |
| clock multiplier = 3 | | clock multiplier = 3 | ||
| cpuid = | | cpuid = | ||
Line 46: | Line 45: | ||
| thread count = | | thread count = | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
| max memory addr = | | max memory addr = | ||
− | + | ||
| power = | | power = | ||
| v core = 3.3 V | | v core = 3.3 V | ||
Line 63: | Line 62: | ||
| packaging = Yes | | packaging = Yes | ||
− | | package | + | | package 0 = CPGA-168 |
− | | package type | + | | package 0 type = CPGA |
− | | package pitch | + | | package 0 pins = 168 |
− | | package | + | | package 0 pitch = 2.286 mm |
− | | socket | + | | package 0 width = 44.069 mm |
− | | socket 2 | + | | package 0 length = 44.069 mm |
− | | socket 3 | + | | package 0 height = 3.556 mm |
+ | | socket 0 = Socket 1 | ||
+ | | socket 0 type = | ||
+ | | socket 0 2 = Socket 2 | ||
+ | | socket 0 2 type = | ||
+ | | socket 0 3 = Socket 3 | ||
+ | | socket 0 3 type = | ||
}} | }} | ||
− | '''Am486DX2-100V8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model was simply renamed from {{\\|Am486DX4-100}} to differentiate it from the {{\\|Am486DX4-100V16B}} which is a similar model with a Write-Back cache policy and | + | '''Am486DX2-100V8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model was simply renamed from {{\\|Am486DX4-100}} to differentiate it from the {{\\|Am486DX4-100V16B}} which is a similar model with a Write-Back cache policy and double the cache size. |
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1 cache=8 | + | |l1 cache=8 KiB |
− | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-through policy) | |l1 extra=(unified, write-through policy) |
Latest revision as of 14:19, 13 December 2017
Edit Values | |
Am486DX4-100V8T | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | Am486DX4-100V8T |
Part Number | A80486DX4-100V8T |
Market | Desktop |
Introduction | 1994 (launched) |
Shop | Amazon |
General Specs | |
Family | Am486 |
Series | Am486DX4V |
Frequency | 100 MHz |
Bus type | FSB |
Bus speed | 33 MHz |
Bus rate | 33 MT/s |
Clock multiplier | 3 |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486DX4V |
Process | 500 nm |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 3.3 V ± 0.3 V |
OP Temperature | 0 °C – 85 °C |
Am486DX2-100V8T was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model was simply renamed from Am486DX4-100 to differentiate it from the Am486DX4-100V16B which is a similar model with a Write-Back cache policy and double the cache size.
Cache[edit]
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
See also[edit]
Facts about "Am486DX4-100V8T - AMD"
base frequency | 100 MHz (0.1 GHz, 100,000 kHz) + |
bus rate | 33 MT/s (0.033 GT/s, 33,000 kT/s) + |
bus speed | 33 MHz (0.033 GHz, 33,000 kHz) + |
bus type | FSB + |
clock multiplier | 3 + |
core count | 1 + |
core name | 486DX4V + |
core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
core voltage tolerance | 0.3 V + |
designer | AMD + |
family | Am486 + |
first launched | 1994 + |
full page name | amd/am486/am486dx4-100v8t + |
instance of | microprocessor + |
l1$ description | 4-way set associative + |
l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
ldate | 1994 + |
manufacturer | AMD + |
market segment | Desktop + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max operating temperature | 85 °C + |
microarchitecture | 80486 + |
min operating temperature | 0 °C + |
model number | Am486DX4-100V8T + |
name | Am486DX4-100V8T + |
part number | A80486DX4-100V8T + |
process | 500 nm (0.5 μm, 5.0e-4 mm) + |
series | Am486DX4V + |
smp max ways | 1 + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + |