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{{intel title|McKinley|arch}}
 
{{intel title|McKinley|arch}}
 
{{microarchitecture
 
{{microarchitecture
−
| atype         = CPU
+
|atype=CPU
−
| name         = McKinley
+
|name=McKinley
−
| designer     = Intel
+
|designer=Intel
−
| manufacturer = Intel
+
|manufacturer=Intel
−
| introduction = July 8, 2002
+
|introduction=July 8, 2002
−
| phase-out    =
+
|process=180 nm
−
| process       = 130 nm
+
|cores=1
−
| cores         = 1
+
|cores 2=2
−
| cores 2       = 2
+
|isa=IA-64
  
−
| pipeline      = <!-- yes for following options -->
+
|type=<!-- e.g. "Superscalar" -->
−
| type         = <!-- e.g. "Superscalar" -->
+
|speculative=<!-- Yes or No only -->
−
| type 2        =
+
|renaming=<!-- Yes or No only -->
−
| type N        =
+
|stages=<!-- ONLY IF FIXED SIZE, otherwise use below for range -->
−
| OoOE          = <!-- Yes or No only -->
+
|predecessor=Merced
−
| speculative   = <!-- Yes or No only -->
+
|predecessor link=intel/microarchitectures/merced
−
| renaming     = <!-- Yes or No only -->
+
|successor=Madison
−
| stages       = <!-- ONLY IF FIXED SIZE, otherwise use below for range -->
+
|successor link=intel/microarchitectures/madison
−
| stages min    =  
+
|pipeline=<!-- yes for following options -->
−
| stages max    =
+
|OoOE=<!-- Yes or No only -->
−
| issues        =  
+
|inst=<!-- yes for instructions options -->
 +
|cache=<!-- yes for cache info -->
 +
|core names=<!-- Yes if specify -->
  
−
| inst          = <!-- yes for instructions options -->
 
−
| isa          =
 
−
| isa 2        =
 
−
| isa N        =
 
−
| feature      =
 
−
| extension    =
 
−
| extension 2  =
 
−
| extension N  =
 
−
 
−
| cache        = <!-- yes for cache info -->
 
−
| l1i          =
 
−
| l1i per      =
 
−
| l1i desc      =
 
−
| l1d          =
 
−
| l1d per      =
 
−
| l1d desc      =
 
−
| l2            =
 
−
| l2 per        =
 
−
| l2 desc      =
 
−
| l3            =
 
−
| l3 per        =
 
−
| l3 desc      =
 
−
 
−
| core names      = <!-- Yes if specify -->
 
−
| core name        =
 
−
| core name 2      =
 
−
| core name N      =
 
−
 
−
| succession      = Yes
 
−
| predecessor      =
 
−
| predecessor link =
 
−
| successor        = Madison
 
−
| successor link  = intel/microarchitectures/madison
 
 
}}
 
}}
 
'''McKinley''' was an [[Itanium]] microarchitecture designed by [[Intel]] as a successor to {{\\|Merced}}.
 
'''McKinley''' was an [[Itanium]] microarchitecture designed by [[Intel]] as a successor to {{\\|Merced}}.

Latest revision as of 18:56, 30 November 2017

Edit Values
McKinley µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionJuly 8, 2002
Process180 nm
Core Configs1, 2
Instructions
ISAIA-64
Succession

McKinley was an Itanium microarchitecture designed by Intel as a successor to Merced.

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/mckinley&oldid=68775"
Facts about "McKinley - Microarchitectures - Intel"
RDF feed
codenameMcKinley +
core count1 + and 2 +
designerIntel +
first launchedJuly 8, 2002 +
full page nameintel/microarchitectures/mckinley +
instance ofmicroarchitecture +
instruction set architectureIA-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameMcKinley +
process180 nm (0.18 μm, 1.8e-4 mm) +