Difference between revisions of "intel/mobile pentium ii"

Latest revision as of 08:54, 11 November 2017

Mobile Pentium II

Standard Pentium II logo
Developer	Intel
Manufacturer	Intel
Type	Microprocessors
Introduction	May, 1997 (announced) April 2, 1998 (launch)
ISA	IA-32, MMX
µarch	P6
Word size	32 bit 4 octets 8 nibbles
Process	250 nm 0.25 μm 2.5e-4 mm
Technology	CMOS
Clock	233 MHz-400 MHz
Package	Mini-Cartridge, PBGA-B615, MMC-1, MMC-2

Mobile Pentium II was a family of high performance P6-based microprocessors introduced by Intel in 1998.

Overview[edit]

Mobile Pentium II was originally introduced in April of 1998. Intel described these processors as having 20 to 40 percent performance increase over the Mobile Pentium MMX family running at the same clock speed. Like their desktop counterparts, they were also packaged in a Mini-Cartridge instead of in a socket setup. The package allowed Intel to separate the cache from the die while still keeping everything closely tied together with respect to the back-side bus. The separate (slower) cache die also meant the processor was cheaper to manufacture.

A second wave of chips were released in early 1999 which had higher clocks, and the cache was once again moved on-die.

Processors[edit]

Tonga core[edit]

Mobile Pentium II Processor
Main processor
Model	µarch	Core	process	Launched	L2$	Freq	TDP	Package
233	P6	Tonga	250 nm 0.25 μm 2.5e-4 mm	2 April 1998	0.5 MiB 512 KiB 524,288 B 4.882812e-4 GiB	233 MHz 0.233 GHz 233,000 kHz	9 W 9,000 mW 0.0121 hp 0.009 kW
266	P6	Tonga	250 nm 0.25 μm 2.5e-4 mm	2 April 1998	0.5 MiB 512 KiB 524,288 B 4.882812e-4 GiB	266 MHz 0.266 GHz 266,000 kHz	10.3 W 10,300 mW 0.0138 hp 0.0103 kW
300	P6	Tonga	250 nm 0.25 μm 2.5e-4 mm	9 September 1998	0.5 MiB 512 KiB 524,288 B 4.882812e-4 GiB	300 MHz 0.3 GHz 300,000 kHz	11.1 W 11,100 mW 0.0149 hp 0.0111 kW

Dixon core[edit]

Mobile Pentium II Processor
Main processor
Model	µarch	Core	process	Launched	L2$	Freq	TDP	Package
266PE	P6	Dixon	250 nm 0.25 μm 2.5e-4 mm	25 January 1999	0.25 MiB 256 KiB 262,144 B 2.441406e-4 GiB	266 MHz 0.266 GHz 266,000 kHz	10.3 W 10,300 mW 0.0138 hp 0.0103 kW
300PE	P6	Dixon	250 nm 0.25 μm 2.5e-4 mm	25 January 1999	0.25 MiB 256 KiB 262,144 B 2.441406e-4 GiB	300 MHz 0.3 GHz 300,000 kHz	11.6 W 11,600 mW 0.0156 hp 0.0116 kW
333	P6	Dixon	250 nm 0.25 μm 2.5e-4 mm	25 January 1999	0.25 MiB 256 KiB 262,144 B 2.441406e-4 GiB	333 MHz 0.333 GHz 333,000 kHz	11.8 W 11,800 mW 0.0158 hp 0.0118 kW
366	P6	Dixon	250 nm 0.25 μm 2.5e-4 mm	25 January 1999	0.25 MiB 256 KiB 262,144 B 2.441406e-4 GiB	366 MHz 0.366 GHz 366,000 kHz	13.1 W 13,100 mW 0.0176 hp 0.0131 kW
400	P6	Dixon	250 nm 0.25 μm 2.5e-4 mm 180 nm 0.18 μm 1.8e-4 mm	14 June 1999	0.25 MiB 256 KiB 262,144 B 2.441406e-4 GiB	400 MHz 0.4 GHz 400,000 kHz	13.1 W 13,100 mW 0.0176 hp 0.0131 kW

Documents[edit]

@@ Line 19: / Line 19: @@
 | clock min         = 233 MHz
 | clock max         = 400 MHz
-| package           =
+| package           = Mini-Cartridge
-| socket            =
+| package 2         = PBGA-B615
+| package 3         = MMC-1
+| package 4         = MMC-2
 }}
 '''Mobile Pentium II''' was a family of high performance {{intel|P6}}-based microprocessors introduced by [[Intel]] in [[1998]].
 == Overview ==
-Mobile Pentium II were originally introduced in April of 1998. Like their {{intel|Pentium II|desktop counterparts}}, they were also packaged in a [[Mini-Cartridge]] instead of in a [[socket]] setup. The package allowed Intel to separate the [[cache]] from the [[die]] while still keeping everything closely tied together with respect to the [[back-side bus]]. The separate (slower) cache die also meant the processor was cheaper to manufacture.
+Mobile Pentium II was originally introduced in April of 1998. Intel described these processors as having 20 to 40 percent performance increase over the {{intel|Mobile Pentium MMX}} family running at the same clock speed. Like their {{intel|Pentium II|desktop counterparts}}, they were also packaged in a [[Mini-Cartridge]] instead of in a [[socket]] setup. The package allowed Intel to separate the [[cache]] from the [[die]] while still keeping everything closely tied together with respect to the [[back-side bus]]. The separate (slower) cache die also meant the processor was cheaper to manufacture.
-A second wave of chip were released in early 99 which had lower [[TDP]], higher clock, and the cache was once again moved on-die.
+A second wave of chips were released in early 1999 which had higher clocks, and the cache was once again moved on-die.
 == Processors ==
@@ Line 42: / Line 44: @@
 <tr><th colspan="9" style="background:#D6D6FF;">Mobile Pentium II Processor</th></tr>
 <tr><th colspan="9">Main processor</th></tr>
-<tr><th>Model</th><th>µarch</th><th>Core</th><th>process</th><th>Launched</th><th>L2$</th><th>Freq</th><th>TDP</th></tr>
+<tr><th>Model</th><th>µarch</th><th>Core</th><th>process</th><th>Launched</th><th>L2$</th><th>Freq</th><th>TDP</th><th>Package</th></tr>
 {{#ask: [[Category:microprocessor models by intel]] [[microprocessor family::Mobile Pentium II]] [[core name::Tonga]]
   |?full page name
@@ Line 53: / Line 55: @@
   |?base frequency#MHz
   |?tdp
+ |?package
   |format=template
   |template=proc table 2
-  |userparam=9
+  |userparam=10
   |mainlabel=-
 }}
@@ Line 71: / Line 74: @@
 <tr><th colspan="9" style="background:#D6D6FF;">Mobile Pentium II Processor</th></tr>
 <tr><th colspan="9">Main processor</th></tr>
-<tr><th>Model</th><th>µarch</th><th>Core</th><th>process</th><th>Launched</th><th>L2$</th><th>Freq</th><th>TDP</th></tr>
+<tr><th>Model</th><th>µarch</th><th>Core</th><th>process</th><th>Launched</th><th>L2$</th><th>Freq</th><th>TDP</th><th>Package</th></tr>
 {{#ask: [[Category:microprocessor models by intel]] [[microprocessor family::Mobile Pentium II]] [[core name::Dixon]]
   |?full page name
@@ Line 82: / Line 85: @@
   |?base frequency#MHz
   |?tdp
+ |?package
   |format=template
   |template=proc table 2
-  |userparam=9
+  |userparam=10
   |mainlabel=-
 }}
 </table>
+== Documents ==
+* [[:File:Mobile Pentium II Processor 300, 266, 233 MHz Performance Brief (September, 1998).pdf|Mobile Pentium II Processor 300, 266, 233 MHz Performance Brief (September, 1998)]]
+* [[:File:MOBILE PENTIUM II PROCESSOR IN BGA PACKAGE AT 366 MHZ, 333 MHZ, 300PE MHZ, AND 266PE MHZ.pdf|MOBILE PENTIUM II PROCESSOR IN BGA PACKAGE AT 366 MHZ, 333 MHZ, 300PE MHZ, AND 266PE MHZ]]
+* [[:File:Mobile Pentium II Processor 366, 333, 300PE, 266PE MHz Performance Brief (January, 1999).pdf|Mobile Pentium II Processor 366, 333, 300PE, 266PE MHz Performance Brief (January, 1999)]]
+* [[:File:Mobile Pentium II Processor Mini-Cartridge 240-Pin BGA Connector Assembly Development Guide (April 1998).pdf|Mobile Pentium II Processor Mini-Cartridge 240-Pin BGA Connector Assembly Development Guide (April 1998)]]
+* [[:File:MOBILE PENTIUM II PROCESSOR IN MINI-CARTRIDGE PACKAGE AT 366 MHZ, 333 MHZ, 300PE MHZ, AND 266PE MHZ.pdf|MOBILE PENTIUM II PROCESSOR IN MINI-CARTRIDGE PACKAGE AT 366 MHZ, 333 MHZ, 300PE MHZ, AND 266PE MHZ]]

designer	Intel +
first announced	May 1997 +
first launched	April 2, 1998 +
full page name	intel/mobile pentium ii +
instance of	microprocessor family +
instruction set architecture	IA-32 + and MMX +
main designer	Intel +
manufacturer	Intel +
microarchitecture	P6 +
name	Mobile Pentium II +
package	Mini-Cartridge +, PBGA-B615 +, MMC-1 + and MMC-2 +
process	250 nm (0.25 μm, 2.5e-4 mm) +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas