From WikiChip
Difference between revisions of "intel/cores/sandy bridge e"
< intel

(Created page with "{{intel title|Sandy Bridge E|core}} {{core}}")
 
 
Line 1: Line 1:
 
{{intel title|Sandy Bridge E|core}}
 
{{intel title|Sandy Bridge E|core}}
−
{{core}}
+
{{core
 +
|name=Sandy Bridge E
 +
|image=sandy bridge e (front).png
 +
|caption=Package front
 +
|image 2=sandy bridge e (back).png
 +
|caption 2=Package back
 +
|developer=Intel
 +
|manufacturer=Intel
 +
|first announced=November 14, 2011
 +
|first launched=November 14, 2011
 +
|isa=x86-64
 +
|isa family=x86
 +
|microarch=Sandy Bridge
 +
|word=64 bit
 +
|proc=32 nm
 +
|tech=CMOS
 +
|predecessor=Gulftown
 +
|predecessor link=intel/cores/gulftown
 +
|successor=Ivy Bridge E
 +
|successor link=intel/cores/ivy bridge e
 +
}}

Latest revision as of 21:01, 24 July 2017

Edit Values
Sandy Bridge E
sandy bridge e (front).png
Package front
sandy bridge e (back).png
Package back
General Info
DesignerIntel
ManufacturerIntel
IntroductionNovember 14, 2011 (announced)
November 14, 2011 (launched)
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
Word Size
8 octets
16 nibbles
64 bit
Process32 nm
0.032 μm
3.2e-5 mm
TechnologyCMOS
Succession
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/cores/sandy_bridge_e&oldid=56322"
Facts about "Sandy Bridge E - Cores - Intel"
RDF feed
designerIntel +
first announcedNovember 14, 2011 +
first launchedNovember 14, 2011 +
instance ofcore +
isax86-64 +
isa familyx86 +
main imageFile:sandy bridge e (front).png + and File:sandy bridge e (back).png +
main image captionPackage front + and Package back +
manufacturerIntel +
microarchitectureSandy Bridge +
nameSandy Bridge E +
process32 nm (0.032 μm, 3.2e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +