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Difference between revisions of "ibm/microarchitectures/z990"
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|type=Superscalar | |type=Superscalar | ||
|type 2=Pipelined | |type 2=Pipelined | ||
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|isa=z/Architecture | |isa=z/Architecture | ||
|l1i=256 KiB | |l1i=256 KiB |
Revision as of 18:34, 19 July 2017
Edit Values | |
z990 µarch | |
General Info | |
Arch Type | CPU |
Designer | IBM |
Manufacturer | IBM |
Introduction | 2002 |
Process | 0.130 µm |
Pipeline | |
Type | Superscalar, Pipelined |
Instructions | |
ISA | z/Architecture |
Cache | |
L1I Cache | 256 KiB/core 4-way set associative |
L1D Cache | 256 KiB/core 4-way set associative |
Succession | |
z990 was a z/Architecture-based microarchitecture designed by IBM and introduced in 2006 for their z990 processors and 2084-series mainframes. The z990 microarchitecture replaced the z900.
Process Technology
The z990 microprocessors were manufactured on IBM's 0.13 µm process with copper interconnections. This technology include silicon-on-insulator (SOI) transistors.
Architecture
Key changes from z900
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Overview
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Die
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Facts about "z990 - Microarchitectures - IBM"
codename | z990 + |
designer | IBM + |
first launched | 2002 + |
full page name | ibm/microarchitectures/z990 + |
instance of | microarchitecture + |
instruction set architecture | z/Architecture + |
manufacturer | IBM + |
microarchitecture type | CPU + |
name | z990 + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |