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Difference between revisions of "ibm/microarchitectures/z900"
< ibm

(Created page with "{{ibm title|z900|arch}} {{microarchitecture |atype=CPU |name=z900 |designer=IBM |manufacturer=IBM }} '''z900''' was a z/Architecture-based microarchitecture designed by ...")
 
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|designer=IBM
 
|designer=IBM
 
|manufacturer=IBM
 
|manufacturer=IBM
 +
|introduction=October 3, 2000
 +
|phase-out=June 30, 2006
 +
|process=0.180 µm
 +
|cores=12
 +
|cores 2=20
 +
|type=Scalar
 +
|type 2=Pipelined
 +
|oooe=No
 +
|speculative=Yes
 +
|renaming=No
 +
|stages=7
 +
|isa=z/Architecture
 +
|l1i=256 KiB
 +
|l1i per=core
 +
|l1d=256 KiB
 +
|l1d per=core
 +
|l2=8-16 MiB
 +
|l2 per=cluster
 
}}
 
}}
 
'''z900''' was a [[z/Architecture]]-based microarchitecture designed by [[IBM]] and introduced in 2000 for their {{ibm|z900}} processors and 2064-series mainframes.
 
'''z900''' was a [[z/Architecture]]-based microarchitecture designed by [[IBM]] and introduced in 2000 for their {{ibm|z900}} processors and 2064-series mainframes.

Revision as of 17:17, 19 July 2017

Edit Values
z900 µarch
General Info
Arch TypeCPU
DesignerIBM
ManufacturerIBM
IntroductionOctober 3, 2000
Phase-outJune 30, 2006
Process0.180 µm
Core Configs12, 20
Pipeline
TypeScalar, Pipelined
OoOENo
SpeculativeYes
Reg RenamingNo
Stages7
Instructions
ISAz/Architecture
Cache
L1I Cache256 KiB/core
L1D Cache256 KiB/core
L2 Cache8-16 MiB/cluster

z900 was a z/Architecture-based microarchitecture designed by IBM and introduced in 2000 for their z900 processors and 2064-series mainframes.

codenamez900 +
core count12 + and 20 +
designerIBM +
first launchedOctober 3, 2000 +
full page nameibm/microarchitectures/z900 +
instance ofmicroarchitecture +
instruction set architecturez/Architecture +
manufacturerIBM +
microarchitecture typeCPU +
namez900 +
phase-outJune 30, 2006 +
pipeline stages7 +
process180 nm (0.18 μm, 1.8e-4 mm) +