From WikiChip
Difference between revisions of "intel/xeon silver"
(→Skylake) |
|||
Line 36: | Line 36: | ||
=== Skylake === | === Skylake === | ||
{{see also|intel/microarchitectures/skylake|l1=Skylake µarch}} | {{see also|intel/microarchitectures/skylake|l1=Skylake µarch}} | ||
+ | Introduced in July 2017, the {{intel|Skylake|l=arch}}-based Xeon Silver microprocessors are all dual-socket [[multiprocessors]] with up to [[12 cores]] and 24 threads. Additionally, all Xeon Silver processors support: | ||
+ | |||
+ | * '''TDP:''' 85 W, 70 W | ||
+ | * '''Mem:''' 768 GiB hexa-channel DDR4-2133 ECC memory. | ||
+ | * '''I/O:''' 48 PCIe 3 lanes | ||
+ | * '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL) | ||
+ | * '''Features:''' {{intel|Hyper-Threading}}, {{Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT). | ||
+ | |||
+ | All Xeon Silver processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 2 {{intel|Ultra Path Interconnect}} (UPI) links. | ||
+ | |||
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
Line 44: | Line 54: | ||
--> | --> | ||
{{comp table start}} | {{comp table start}} | ||
− | <table class="comptable sortable | + | <table class="comptable sortable tc5 tc6"> |
<tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Silver Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Silver Processors</th></tr> | ||
− | <tr class="comptable-header"><th> </th><th colspan=" | + | <tr class="comptable-header"><th> </th><th colspan="6">Main processor</th><th colspan="2">Cache</th><th colspan="2">Memory</th></tr> |
− | {{comp table header 1|cols=Price | + | {{comp table header 1|cols=Price, Launched, Cores, Threads, Frequency, TDP, L2$, L3$, Mem Type, Max Mem}} |
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Skylake]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Silver]] [[microarchitecture::Skylake]] | ||
|?full page name | |?full page name | ||
|?model number | |?model number | ||
|?release price | |?release price | ||
− | |||
|?first launched | |?first launched | ||
|?core count | |?core count | ||
Line 58: | Line 67: | ||
|?base frequency#GHz | |?base frequency#GHz | ||
|?tdp | |?tdp | ||
+ | |?l2$ size | ||
+ | |?l3$ size | ||
+ | |?supported memory type | ||
|?max memory#GiB | |?max memory#GiB | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=12 |
|mainlabel=- | |mainlabel=- | ||
}} | }} |
Revision as of 18:22, 11 July 2017
Xeon Silver | |
Xeon Silver Logo | |
Developer | Intel |
Manufacturer | Intel |
Type | Microprocessors |
Introduction | May 4, 2017 (announced) July 11, 2017 (launch) |
Architecture | x86 server multiprocessors |
ISA | x86-64 |
µarch | Skylake |
Word size | 64 bit 8 octets
16 nibbles |
Process | 14 nm 0.014 μm
1.4e-5 mm |
Technology | CMOS |
Package | FCLGA-3647 |
Socket | LGA-3647 |
Succession | |
← | |
Xeon E7 Xeon E5 |
Xeon Silver is a family of 64-bit x86 dual-socket multi-core mid-range performance server microprocessors introduced by Intel in 2017.
Contents
Overview
Released in July 2017, the Xeon Silver are the successor to the Xeon E5/E7 families. Xeon Silver is geared toward mid-range workloads dual-socket server.
Members
Skylake
- See also: Skylake µarch
Introduced in July 2017, the Skylake-based Xeon Silver microprocessors are all dual-socket multiprocessors with up to 12 cores and 24 threads. Additionally, all Xeon Silver processors support:
- TDP: 85 W, 70 W
- Mem: 768 GiB hexa-channel DDR4-2133 ECC memory.
- I/O: 48 PCIe 3 lanes
- ISA: Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL)
- Features: Hyper-Threading, Template:Turbo Boost, Speed Shift, vPro, VT-x, TSX, TXT, Volume Management Device (VMD), Mode-based Execute Control (MBE), Key Protection Technology (KPT), and Platform Trust Technology (PTT).
All Xeon Silver processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 2 Ultra Path Interconnect (UPI) links.
List of Skylake-based Xeon Silver Processors | ||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Main processor | Cache | Memory | ||||||||||||||||||
Model | Price | Launched | Cores | Threads | Frequency | TDP | L2$ | L3$ | Mem Type | Max Mem | ||||||||||
Count: 0 |
See also
- Xeon Silver
- Xeon Gold
- Xeon Platinum
Facts about "Xeon Silver - Intel"
designer | Intel + |
first announced | May 4, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon silver + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Skylake + |
name | Xeon Silver + |
package | FCLGA-3647 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | LGA-3647 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |