From WikiChip
Difference between revisions of "amd/duron/dhm1300alq1b"
< amd‎ | duron

m (Bot: corrected mem)
m (Bot: Automated text replacement (-\| electrical += Yes +))
Line 47: Line 47:
 
| max memory          = 4 GiB
 
| max memory          = 4 GiB
  
| electrical          = Yes
+
 
 
| power              =  
 
| power              =  
 
| v core              = 1.50 V
 
| v core              = 1.50 V

Revision as of 21:56, 23 June 2017

Template:mpu The Mobile Duron 1300 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in late early 2002. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 1300 MHz with a bus capable of 200 MT/s.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Halt State
  • Sleep State

Documents

DataSheet

See also

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +