From WikiChip
Difference between revisions of "ambric/am2000/am2012"
< ambric‎ | am2000

m (Bot: corrected mem)
Line 98: Line 98:
 
| bandwidth schan    =  
 
| bandwidth schan    =  
 
| bandwidth dchan    =  
 
| bandwidth dchan    =  
| max memory        = 4 GB
+
| max memory        = 4 GiB
 
}}
 
}}
  

Revision as of 05:52, 23 June 2017

Template:mpu Am2012 was an MPPA introduced in late 2006 by Ambric. This model was made of 12 Brics arranged as a grid, making up a total of 96 32-bit RICS-like cores operating asynchronously at 1-333 MHz.

Architecture

Main article: Am2000 § Architecture

The Am2012 is made of 12 homogeneous 'Brics' laid out in a grid to form 96 cores and 96 RAM units.

General layout:

  • 12x Brics

Cache

The Am2012 contains 12 Brics, each with its own RAM Unit (RU) of 13 kB of SRAM for a total of 156 kB of SRAM.

Memory controller

Integrated Memory Controller
Type DDR2-400
Controllers 2
Channels 1
Max memory 4 GiB

Expansions

  • PCIe
  • JTAG
  • GPIO @ 100 MHz
  • serial flash
Facts about "Am2012 - Ambric"
has featurePCIe +, JTAG +, GPIO + and serial flash +