Revision as of 18:53, 16 June 2017

Alpha 21064 was the first Alpha microarchitecture designed by DEC and introduced in 1992.

Etymology

The microarchitecture name Alpha 21064 is composed of both the ISA and the implementation. In particular, the "Alpha" refers to DEC's Alpha AXP instruction set architecture while the "21064" refers to a "21st century"-ready 64-bit "generation 0" microarchitecture.

Release Dates

DEC first announced their 21064 architecture in February of 1992. Alpha 21064-based chips were first introduced during COMDEX on November 20, 1992.

Process Technology

See also: 0.75 µm process

Alpha 21064 was manufactured on DEC's CMOS-4, their then-newest 0.75 µm process. The process offered three levels of aluminum interconnects and a nominal 3.3 V power supply. Note that prior to the introduction of the 21064, DEC produced early "assistance" samples for software developers which were manufactured on an older CMOS-3 process (1 µm). For that reason those chips also had reduced cache amount, in addition to no FPU support.

Compatibility

Architecture

This section is empty; you can help add the missing info by editing this page.

Die

• 30 W power dissipation @ 200 MHz, 3.3 V power supply
• 0.75 µm process
• 3 metal layers
• 1,680,000 transistors
• 13.9 mm x 16.8 mm
• 233.52 mm² die size
• PGA-431
  • 291 signal pins
  • 140 power/ground rail pins

References

• McLellan, Edward. "The Alpha AXP architecture and 21064 processor." IEEE Micro 13.3 (1993): 36-47.