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Difference between revisions of "dec/microarchitectures/alpha 21064"
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'''Alpha 21064''' was the first [[Alpha]] microarchitecture designed by [[DEC]] and introduced in 1992.
 
'''Alpha 21064''' was the first [[Alpha]] microarchitecture designed by [[DEC]] and introduced in 1992.
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== Release Dates ==
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== Process Technology ==
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== Compatibility ==
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{| class="wikitable"
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! Vendor !! OS  !! Version !! Notes
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|-
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| Microsoft || Windows || style="background-color: #d6ffd8;" | Windows NT || Support
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|-
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| DEC || OpenVMS || style="background-color: #d6ffd8;" | OpenVMS AXP V1.0 || Initial OpenVMS support
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|-
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| DEC || OSF/1 AXP || style="background-color: #d6ffd8;" | 1.0 ||
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|-
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| Novell || Netware || style="background-color: #d6ffd8;" | 3.2 ||
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|}

Revision as of 12:15, 16 June 2017

Edit Values
Alpha 21064 µarch
General Info
Arch TypeCPU
DesignerDEC
ManufacturerDEC
IntroductionNovember 20 1992
Process0.75 µm, 0.675 µm
Core Configs1
Pipeline
TypeSuperscalar
OoOENo
SpeculativeYes
Reg RenamingNo
Stages7-12
Decode2-way
Instructions
ISAAlpha
Cache
L1I Cache8 KiB/core
direct-mapped
L1D Cache8 KiB/core
direct-mapped
L2 Cache0.125-16 MiB/motherboard
Succession

Alpha 21064 was the first Alpha microarchitecture designed by DEC and introduced in 1992.

Release Dates

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Process Technology

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Compatibility

Vendor OS Version Notes
Microsoft Windows Windows NT Support
DEC OpenVMS OpenVMS AXP V1.0 Initial OpenVMS support
DEC OSF/1 AXP 1.0
Novell Netware 3.2
Retrieved from "https://en.wikichip.org/w/index.php?title=dec/microarchitectures/alpha_21064&oldid=45083"
Facts about "Alpha 21064 - Microarchitectures - DEC"
RDF feed
codenameAlpha 21064 +
core count1 +
designerDEC +
first launchedNovember 20, 1992 +
full page namedec/microarchitectures/alpha 21064 +
instance ofmicroarchitecture +
instruction set architectureAlpha +
manufacturerDEC +
microarchitecture typeCPU +
nameAlpha 21064 +
pipeline stages (max)12 +
pipeline stages (min)7 +
process750 nm (0.75 μm, 7.5e-4 mm) + and 675 nm (0.675 μm, 6.75e-4 mm) +