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Difference between revisions of "marvell/armada/610"
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| − | '''ARMADA 610''' was a {{arch|32}} [[ARM]] microprocessor introduced by [[Marvell]] in 2009. This processor, which is based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture, operated at 1 GHz and supported up to 2 GiB of DDR3-1066 memory. The ARMADA 610 also | + | '''ARMADA 610''' was a {{arch|32}} [[ARM]] microprocessor introduced by [[Marvell]] in 2009. This processor, which is based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture, operated at 1 GHz and supported up to 2 GiB of DDR3-1066 memory. The ARMADA 610 also integrated a [[Vivante]] |
| + | {{vivante|GC860}} [[IGP]] as well as an [[EPD]] display controller which eliminates page turn lag. | ||
== Cache == | == Cache == | ||
| Line 140: | Line 141: | ||
== Graphics == | == Graphics == | ||
| − | + | The 618 incorporates a Vivante {{vivante|GC860}} [[GPU]] capable of 45 million triangle strips per second, 250 Mpixel/s fill rate. | |
| + | |||
| + | {{integrated graphics | ||
| + | | gpu = GC860 | ||
| + | | device id = | ||
| + | | designer = Vivante | ||
| + | | execution units = | ||
| + | | max displays = | ||
| + | | max memory = | ||
| + | | frequency = ? MHz | ||
| + | | max frequency = | ||
| + | |||
| + | | output crt = | ||
| + | | output sdvo = | ||
| + | | output dsi = Yes | ||
| + | | output edp = | ||
| + | | output dp = | ||
| + | | output hdmi = Yes | ||
| + | | output vga = | ||
| + | | output dvi = | ||
| + | |||
| + | | directx ver = 11 | ||
| + | | opengl ver = 3.0 | ||
| + | | opencl ver = 1.1 | ||
| + | | opengl es ver = 2.0 | ||
| + | | hdmi ver = | ||
| + | | dp ver = | ||
| + | | edp ver = | ||
| + | | max res hdmi = 1920x1080 | ||
| + | | max res hdmi freq = | ||
| + | | max res dp = | ||
| + | | max res dp freq = | ||
| + | | max res edp = | ||
| + | | max res edp freq = | ||
| + | | max res vga = | ||
| + | | max res vga freq = | ||
| + | | max res dsi = 1920x1080 | ||
| + | | max res dsi freq = | ||
| + | }} | ||
| − | |||
* 1080p decode support for H.264 high profile, VC-1/WMV, MPEG-4, MPEG-2, H.263, On-2. | * 1080p decode support for H.264 high profile, VC-1/WMV, MPEG-4, MPEG-2, H.263, On-2. | ||
| − | * 1080p encode support for h.264 high profile, MPEG-4, MPEG-2, H.263 and On-2 | + | * 1080p encode support for h.264 high profile, MPEG-4, MPEG-2, H.263 and On-2. |
== Hardware Accelerators == | == Hardware Accelerators == | ||
Revision as of 15:31, 28 May 2017
Template:mpu ARMADA 610 was a 32-bit ARM microprocessor introduced by Marvell in 2009. This processor, which is based on Marvell's Sheeva PJ4 microarchitecture, operated at 1 GHz and supported up to 2 GiB of DDR3-1066 memory. The ARMADA 610 also integrated a Vivante
GC860 IGP as well as an EPD display controller which eliminates page turn lag.
Contents
Cache
- Main article: Sheeva PJ4 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Static Memory Controller
- 4 chip selects, up to 256 MB each
- Asynch/Sync operation up to 78 MHz
- A/D and AA/D Mode, x8 & x16 NOR Flash interface
- Support for VLIO or companion chips
NAND Flash Controller
- ONFI compliant controller supporting SLC and MLC NAND, x8 & x16, small block and large block
- 2 Chip Selects with up to 64GB of address space
- Support for 2 KB and 4 KB page sizes
- 2-bit detect/1-bit correct ECC & 16-bit correct BCH
MMC, SD and SDIO Controller
- 4x MMC/SD/SDIO/CE-ATA Controllers
- Supports MMC/eMMC v4.2, 4.3 and 4.4
- SDIO v 2.0, SDcard v2.1 and v3.0 (UHS-I)
- CE-ATA 1/4/8-Bit, SPI mode and boot suppor
Expansions
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Expansion Options
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Graphics
The 618 incorporates a Vivante GC860 GPU capable of 45 million triangle strips per second, 250 Mpixel/s fill rate.
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Integrated Graphics Information
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- 1080p decode support for H.264 high profile, VC-1/WMV, MPEG-4, MPEG-2, H.263, On-2.
- 1080p encode support for h.264 high profile, MPEG-4, MPEG-2, H.263 and On-2.
Hardware Accelerators
Marvell Wireless Trusted Module v3
- Hashing units: MD5, SHA-1, HMAC-SHA-1; SHA-224/SHA256 and HMAC, SHA-512 and HMAC, MD5 and HMAC-MD5
- Symmetric crypto: AES (128 to 256 & ECB, CBC, CTR/XTS modes), DES/3DES (ECB & CBC), RC4
- Asymmetric crypto: ECC (Prime field ECC, FIPS std curve EC-224/256, EC-DSA) & RSA (RSA key gen, PKCS#1 v1.5/v2.1 Digital Signatures, x.509 Digital Certificate), & DiffieHellman Key exchange. True HW RNG, FIPS 140-2 certification
Features
[Edit/Modify Supported Features]
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Supported ARM Extensions & Processor Features
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Block Diagram
Documents
Facts about "ARMADA 610 - Marvell"
| has ecc memory support | false + |
| integrated gpu | GC860 + |
| integrated gpu designer | Vivante + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
| max memory bandwidth | 7.942 GiB/s (8,132.608 MiB/s, 8.528 GB/s, 8,527.658 MB/s, 0.00776 TiB/s, 0.00853 TB/s) + |
| max memory channels | 1 + |
| supported memory type | DDR3-1066 + and DDR2-800 + |