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Difference between revisions of "intel/atom/z500"
Line 61: | Line 61: | ||
| tjunc min = 0 °C | | tjunc min = 0 °C | ||
| tjunc max = 90 °C | | tjunc max = 90 °C | ||
+ | | tcase min = 0 °C | ||
+ | | tcase max = 70 °C | ||
| tstorage min = -40 °C | | tstorage min = -40 °C | ||
| tstorage max = 85 °C | | tstorage max = 85 °C |
Revision as of 16:46, 1 April 2017
Template:mpu Z500 is an ultra-low power 32-bit x86 microprocessor introduced by Intel in early 2008 specifically for Mobile Internet Devices (MID). The Z500, which is based on the Bonnell microarchitecture (Silverthorne core), is manufactured on a 45 nm process. This processor operates at 800 MHz with a TDP of just 650 mW and an average power of 160 mW. The MPU features a legacy 400 MT/s front-side bus capable of communicating with the Poulsbo chipset in both low-power CMOS mode as well as normal GTL mode (which also works with other chipsets).