Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "xiaomi/surge/s1"
(Created page with "{{xiaomi title|Surge S1}} {{mpu | name = Xiaomi Surge S1 | no image = Yes | image = | image size = | caption =...") |
|||
| Line 1: | Line 1: | ||
{{xiaomi title|Surge S1}} | {{xiaomi title|Surge S1}} | ||
{{mpu | {{mpu | ||
| + | | future = Yes | ||
| name = Xiaomi Surge S1 | | name = Xiaomi Surge S1 | ||
| no image = Yes | | no image = Yes | ||
| Line 15: | Line 16: | ||
| part number 3 = | | part number 3 = | ||
| market = Mobile | | market = Mobile | ||
| − | | first announced = February 28 2017 | + | | first announced = February 28, 2017 |
| first launched = | | first launched = | ||
| last order = | | last order = | ||
| Line 92: | Line 93: | ||
| socket 0 type = | | socket 0 type = | ||
}} | }} | ||
| + | '''Surge S1''' is a {{arch|64}} [[octa-core]] performance [[ARM]] system-on-chip designed by [[Xiaomi]] and introduced in early [[2017]]. This chip incorporates 8 {{armh|Cortex-A53}} cores in a {{armh|big.LITTLE}} configuration with four cores operating at up to 2.2 GHz with the other four set of cores operating at 1.4 GHz. This processor is fabricated on TSMC's [[28 nm process|28 nm HPC+ process]] and incorporates a {{armh|Mali-T860}} [[IGP]]. | ||
Revision as of 14:32, 3 March 2017
Template:mpu Surge S1 is a 64-bit octa-core performance ARM system-on-chip designed by Xiaomi and introduced in early 2017. This chip incorporates 8 Cortex-A53 cores in a big.LITTLE configuration with four cores operating at up to 2.2 GHz with the other four set of cores operating at 1.4 GHz. This processor is fabricated on TSMC's 28 nm HPC+ process and incorporates a Mali-T860 IGP.