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Difference between revisions of "phytium/microarchitectures/xiaomi"
< phytium

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'''Xiaomi''' is an [[ARM]] microarchitecture designed by [[Phytium]] for their consumer market and server-based microprocessors.
 
'''Xiaomi''' is an [[ARM]] microarchitecture designed by [[Phytium]] for their consumer market and server-based microprocessors.
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== Brands ==
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{| class="wikitable"
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! Codename !! Brand !! Description
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|-
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| Mars || {{phytium|FT-2000}} ||
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* High performance
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* High bandwidth, Large memory
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* High bandwidth I/O
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* Large scale cache coherency
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|-
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| Earth || {{phytium|FT-1500A}} ||
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* Moderate performance
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* High power efficiency
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* High density computing
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* Low cost
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|}
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== Architecture ==
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=== Overview ===
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* Fully [[ARMv8]] compatible
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** Support AArch32 and AArch64 modes
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** EL0-EL3 supported
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** ASIMD-128
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* [[28 nm process]]
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* Scalable design
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** 4 to 64 cores
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* Mesh topology on chip network
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* Panel-based (grid) architecture
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* Global cache coherency
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* 2x DDR3-1600 channels per panel
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** [[ECC]] support
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* 2x 16-lane [[PCIe]] 3.0
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=== Panel Architecture ===
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{{empty section}}
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=== Block Diagram ===
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{{empty section}}
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=== Memory Hierarchy ===
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{{empty section}}
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=== Pipeline ===
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{{empty section}}
  
 
== References ==
 
== References ==
 
* Zhang, C. (2015, August). Mars: A 64-core ARMv8 processor. In ''Hot Chips 27 Symposium'' (HCS), 2015 IEEE (pp. 1-23). IEEE.
 
* Zhang, C. (2015, August). Mars: A 64-core ARMv8 processor. In ''Hot Chips 27 Symposium'' (HCS), 2015 IEEE (pp. 1-23). IEEE.

Revision as of 03:17, 8 February 2017

Edit Values
Xiaomi µarch
General Info
Arch TypeCPU
DesignerPhytium
ManufacturerTSMC
Introduction2017
Process28 nm
Pipeline
TypeSuperscalar
SpeculativeYes
Reg RenamingYes
Instructions
ISAARMv8
Cores
Core NamesFTC660,
FTC661

Xiaomi is an ARM microarchitecture designed by Phytium for their consumer market and server-based microprocessors.

Brands

Codename Brand Description
Mars FT-2000
  • High performance
  • High bandwidth, Large memory
  • High bandwidth I/O
  • Large scale cache coherency
Earth FT-1500A
  • Moderate performance
  • High power efficiency
  • High density computing
  • Low cost

Architecture

Overview

  • Fully ARMv8 compatible
    • Support AArch32 and AArch64 modes
    • EL0-EL3 supported
    • ASIMD-128
  • 28 nm process
  • Scalable design
    • 4 to 64 cores
  • Mesh topology on chip network
  • Panel-based (grid) architecture
  • Global cache coherency
  • 2x DDR3-1600 channels per panel
  • 2x 16-lane PCIe 3.0

Panel Architecture

New text document.svg This section is empty; you can help add the missing info by editing this page.

Block Diagram

New text document.svg This section is empty; you can help add the missing info by editing this page.

Memory Hierarchy

New text document.svg This section is empty; you can help add the missing info by editing this page.

Pipeline

New text document.svg This section is empty; you can help add the missing info by editing this page.

References

  • Zhang, C. (2015, August). Mars: A 64-core ARMv8 processor. In Hot Chips 27 Symposium (HCS), 2015 IEEE (pp. 1-23). IEEE.
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Facts about "Xiaomi - Microarchitectures - Phytium"
RDF feed
codenameXiaomi +
designerPhytium +
first launched2017 +
full page namephytium/microarchitectures/xiaomi +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerTSMC +
microarchitecture typeCPU +
nameXiaomi +
process28 nm (0.028 μm, 2.8e-5 mm) +