From WikiChip
Difference between revisions of "WikiChip:sandbox"
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== wireless test == | == wireless test == | ||
− | <table style="border: solid 1px #e5e5ff; width: 400px; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;"><tr style="text-align: center; background: # | + | <table style="border-collapse: collapse; border: solid 1px #e5e5ff; width: 400px; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;"><tr style="text-align: center; background: #b7d1fb; font-size: 16px;"><td colspan="2"><span style="margin: 10px;">[[File:Antu network-wireless-connected-100.svg|25px]]</span><span style="font-weight: bold; font-size: 19px;">Wireless Communications</span></td></tr> |
− | <tr style="text-align: center; background: # | + | <tr style="text-align: center; background: #e7f0fe; font-size: 12px;"><td colspan="2">'''Wi-Fi'''</td></tr> |
− | <tr><th style="width: 50px;">WiFi</th><td> | + | <tr style="background: #ffffdb;"><th style="width: 50px;">WiFi</th><td> |
<table> | <table> | ||
<tr><th style="width: 100px;">802.11-1997</th><td>Yes</td></tr> | <tr><th style="width: 100px;">802.11-1997</th><td>Yes</td></tr> | ||
Line 51: | Line 51: | ||
</table> | </table> | ||
</td></tr> | </td></tr> | ||
− | <tr style="text-align: center; background: # | + | <tr style="text-align: center; background: #e7f0fe; font-size: 12px;"><td colspan="2">'''Cellular'''</td></tr> |
− | <tr><th>2G</th><td><table><tr><th style="width: 75px;">GSM</th><td style="width: | + | <tr style="background: #e6ffe6;"><th style="width: 25px;">2G</th><td><table><tr><th style="width: 75px;">GSM</th><td style="width: 90px;"> </td><td>Yes</td></tr><tr><th>GPRS</th><td style="width: 90px;"> </td><td>Yes</td></tr><tr><th>EDGE</th><td style="width: 90px;"> </td><td>Yes</td></tr><tr><th style="width: 75px;">cdmaOne</th><td colspan="2"> |
<table> | <table> | ||
− | <tr><th style="width: | + | <tr><th style="width: 90px;">IS-95A</th><td>Yes</td></tr> |
<tr><th>IS-95B</th><td>Yes</td></tr> | <tr><th>IS-95B</th><td>Yes</td></tr> | ||
</table> | </table> | ||
</td></tr> | </td></tr> | ||
</table></td></tr> | </table></td></tr> | ||
− | <tr><th>3G</th><td><table><tr><th style="width: 75px;">UMTS</th><td> | + | <tr style="background: #fff6db;"><th>3G</th><td><table><tr><th style="width: 75px;">UMTS</th><td> |
<table> | <table> | ||
− | <tr><th style="width: | + | <tr><th style="width: 90px;">WCDMA</th><td>Yes</td></tr> |
<tr><th>HSDPA</th><td>Yes</td><td style="width: 100px; text-align: right;">7.2 Mbps</td></tr> | <tr><th>HSDPA</th><td>Yes</td><td style="width: 100px; text-align: right;">7.2 Mbps</td></tr> | ||
<tr><th>HSUPA</th><td>Yes</td><td style="width: 100px; text-align: right;">5.76 Mbps</td></tr> | <tr><th>HSUPA</th><td>Yes</td><td style="width: 100px; text-align: right;">5.76 Mbps</td></tr> | ||
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</td></tr><tr><th style="width: 75px;">CDMA2000</th><td> | </td></tr><tr><th style="width: 75px;">CDMA2000</th><td> | ||
<table> | <table> | ||
− | <tr><th style="width: | + | <tr><th style="width: 90px;">1X</th><td>Yes</td></tr> |
<tr><th>1xEV-DO</th><td>Yes</td></tr> | <tr><th>1xEV-DO</th><td>Yes</td></tr> | ||
<tr><th>1X Advanced</th><td>Yes</td></tr> | <tr><th>1X Advanced</th><td>Yes</td></tr> | ||
</table> | </table> | ||
</td></tr></table></td></tr> | </td></tr></table></td></tr> | ||
− | <tr style="text-align: center; background: # | + | <tr style="text-align: center; background: #e7f0fe; font-size: 12px;"><td colspan="2">'''Satellite'''</td></tr> |
</table> | </table> |
Revision as of 01:05, 21 November 2016
Welcome to this sandbox page. Sandbox pages provide space to experiment with the process of editing.
ssssssssssss | ||||||||
DATA BUS I/O | D0 | 01 | 16 | CM-RAM0 | X | |||
D1 | 02 | 15 | CM-RAM1 | X | ||||
D2 | 03 | 14 | CM-RAM2 | X | ||||
D3 | 04 | 13 | CM-RAM3 | X | ||||
Vss | 05 | 12 | Vdd | X | ||||
CLOCK PHASE 1/2 | Ø1 | 06 | 11 | CM-ROM | X | |||
Ø2 | 07 | 10 | TEST | X | ||||
SYNC | 08 | 09 | RESET | X | ||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
Cache Info Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. [Edit Values]The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes. | ||||||||||||
L1$ | 128 KiB |
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L2$ | 128 KiB |
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L3$ | 128 KiB |
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L4$ | 128 KiB |
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Off-package cache support | ||||||||||||
Mobo | 512 KiB |
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