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Difference between revisions of "amd/duron/dhd1300amt1b"
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== Documents ==
 
== Documents ==
 
=== DataSheet ===
 
=== DataSheet ===
−
* [[:File:AMD Duron Processor Model 3 Data Sheet (June, 2001).pdf|AMD Duron Processor Model 3 Data Sheet]]; Publication # 23802; Rev: I; Issue Date: June 2001.
 
 
* [[:File:AMD Duron Processor Model 7 Data Sheet (January, 2002).pdf|AMD Duron Processor Model 7 Data Sheet]]; Publication # 24310; Rev: G; Issue Date: January 2002.
 
* [[:File:AMD Duron Processor Model 7 Data Sheet (January, 2002).pdf|AMD Duron Processor Model 7 Data Sheet]]; Publication # 24310; Rev: G; Issue Date: January 2002.
 
=== Other ===
 
=== Other ===

Revision as of 00:51, 25 October 2016

Template:mpu The Duron 1300 based on the Morgan core was a 32-bit x86 microprocessor developed by AMD and introduced in early 2002. This model was part of the second generation of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 1300 MHz with a bus capable of 200 MT/s with a max TDP of 60 W and a typical TDP of 55.2 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Halt State
  • Sleep State

Documents

DataSheet

Other

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/dhd1300amt1b&oldid=26179"
Facts about "Duron 1300 (Morgan) - AMD"
RDF feed
has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +