From WikiChip
Difference between revisions of "amd/k6-2/k6-2-300anz-66"
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== Cache == | == Cache == | ||
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | {{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | ||
− | [[L2$]] can be 512 | + | [[L2$]] can be 512 KiB to 1 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip. |
{{cache info | {{cache info | ||
− | |l1i cache=32 | + | |l1i cache=32 KiB |
− | |l1i break=1x32 | + | |l1i break=1x32 KiB |
|l1i desc=2-way set associative | |l1i desc=2-way set associative | ||
|l1i extra= | |l1i extra= | ||
− | |l1d cache=32 | + | |l1d cache=32 KiB |
− | |l1d break=1x32 | + | |l1d break=1x32 KiB |
|l1d desc=2-way set associative | |l1d desc=2-way set associative | ||
|l1d extra= | |l1d extra= |
Revision as of 00:31, 21 September 2016
Template:mpu K6-2/300ANZ-66 was a 32-bit x86 K6-2-based mobile microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 300 MHz with a FSB operating at 66 MHz.
Contents
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Documents
DataSheet
- Mobile AMD-K6-2 Processor Data Sheet; Publication #21896 Revision E/0, May 2000
Facts about "AMD-K6-2/300ANZ-66 - AMD"
base frequency | 299.99 MHz (0.3 GHz, 299,990 kHz) + |
bus rate | 66.66 MT/s (0.0667 GT/s, 66,660 kT/s) + |
bus speed | 66.66 MHz (0.0667 GHz, 66,660 kHz) + |
bus type | FSB + |
clock multiplier | 4.5 + |
core count | 1 + |
core family | 5 + |
core model | 8 + |
core name | Chomper Extended + |
core stepping | 12 + |
core voltage | 1.8 V (18 dV, 180 cV, 1,800 mV) + |
core voltage tolerance | 0.1 V + |
cpuid | 58C + |
designer | AMD + |
die area | 81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) + |
family | K6-2 + |
first announced | March 22, 1999 + |
first launched | March 22, 1999 + |
full page name | amd/k6-2/k6-2-300anz-66 + |
instance of | microprocessor + |
io voltage | 3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) + |
io voltage tolerance | 7% + |
l1d$ description | 2-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
ldate | March 22, 1999 + |
manufacturer | AMD + |
market segment | Mobile + |
max case temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max storage temperature | 423.15 K (150 °C, 302 °F, 761.67 °R) + |
microarchitecture | K6-2 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
model number | K6-2/300ANZ-66 + |
name | K6-2/300ANZ-66 + |
part number | AMD-K6-2/300ANZ-66 + |
platform | Super 7 + |
power dissipation | 10 W (10,000 mW, 0.0134 hp, 0.01 kW) + |
process | 250 nm (0.25 μm, 2.5e-4 mm) + |
series | K6-2 Mobile + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 1 + |
transistor count | 9,300,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |