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Difference between revisions of "amd/k6-2/k6-2-500adk"
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'''K6-2/500ADK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 500 MHz with a [[FSB]] operating at 100 MHz.
 
'''K6-2/500ADK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 500 MHz with a [[FSB]] operating at 100 MHz.
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== Cache ==
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{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}}
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[[L2$]] can be 512 KB to 1 MB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip.
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{{cache info
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|l1i cache=32 KB
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|l1i break=1x32 KB
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|l1i desc=2-way set associative
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|l1i extra=
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|l1d cache=32 KB
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|l1d break=1x32 KB
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|l1d desc=2-way set associative
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|l1d extra=
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|l2 cache=
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|l2 break=
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|l2 desc=
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|l2 extra=
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|l3 cache=
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|l3 break=
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|l3 desc=
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|l3 extra=
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}}
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== Graphics ==
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This SoC has no integrated graphics processing unit.
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== Features ==
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{{mpu features
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| mmx  = true
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| 3dnow = true
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}}
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* Auto-power down state
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* Stop clock state
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== Documents ==
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=== DataSheet ===
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* [[:File:Mobile AMD-K6-2 Processor Data Sheet (May, 2000).pdf|Mobile AMD-K6-2 Processor Data Sheet]]; Publication #21896 Revision E/0, May 2000

Revision as of 01:12, 5 August 2016

Template:mpu K6-2/500ADK was a 32-bit x86 K6-2-based mobile microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 500 MHz with a FSB operating at 100 MHz.

Cache

Main article: K6-2 § Cache

L2$ can be 512 KB to 1 MB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x32 KB 2-way set associative
L1D$ 32 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x32 KB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state

Documents

DataSheet

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-2/k6-2-500adk&oldid=23348"
Facts about "K6-2/500ADK - AMD"
RDF feed
base frequency499.99 MHz (0.5 GHz, 499,990 kHz) +
bus rate99.99 MT/s (0.1 GT/s, 99,990 kT/s) +
bus speed99.99 MHz (0.1 GHz, 99,990 kHz) +
bus typeFSB +
clock multiplier5 +
core count1 +
core family5 +
core model8 +
core nameChomper Extended +
core stepping12 +
core voltage2.1 V (21 dV, 210 cV, 2,100 mV) +
core voltage tolerance0.1 V +
cpuid58C +
designerAMD +
die area81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
familyK6-2 +
first announcedSeptember 20, 1999 +
first launchedSeptember 20, 1999 +
full page nameamd/k6-2/k6-2-500adk +
instance ofmicroprocessor +
io voltage3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) +
io voltage tolerance7% +
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
ldateSeptember 20, 1999 +
manufacturerAMD +
market segmentMobile +
max case temperature353.15 K (80 °C, 176 °F, 635.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature423.15 K (150 °C, 302 °F, 761.67 °R) +
microarchitectureK6-2 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature208.15 K (-65 °C, -85 °F, 374.67 °R) +
model numberK6-2/500ADK +
nameK6-2/500ADK +
part numberAMD-K6-2/500ADK +
platformSuper 7 +
process250 nm (0.25 μm, 2.5e-4 mm) +
seriesK6-2 Mobile P +
smp max ways1 +
technologyCMOS +
thread count1 +
transistor count9,300,000 +
word size32 bit (4 octets, 8 nibbles) +