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Difference between revisions of "intel/pentium silver/j5005"
< intel‎ | pentium silver

(J5005 does not have AVX)
 
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{{title|Pentium Silver J5005}}
+
{{intel title|Pentium Silver J5005}}
 
{{chip
 
{{chip
 
|name=Pentium Silver J5005
 
|name=Pentium Silver J5005
Line 51: Line 51:
 
|l1d policy=write-back
 
|l1d policy=write-back
 
|l2 cache=4 MiB
 
|l2 cache=4 MiB
−
|l2 break=2x2 MiB
+
|l2 break=1x4 MiB
 
|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
 
|l2 policy=write-back
 
|l2 policy=write-back
Line 105: Line 105:
 
| opengl ver        = 4.4
 
| opengl ver        = 4.4
 
| opencl ver        = 2.0
 
| opencl ver        = 2.0
−
| hdmi ver          = 1.4a
+
| hdmi ver          = 2.0
 
| dp ver            = 1.2
 
| dp ver            = 1.2
 
| edp ver            = 1.4
 
| edp ver            = 1.4
 
| max res hdmi      = 4096x2304
 
| max res hdmi      = 4096x2304
−
| max res hdmi freq  = 24 Hz
+
| max res hdmi freq  = 60 Hz
 
| max res dp        = 4096x2304
 
| max res dp        = 4096x2304
 
| max res dp freq    = 60 Hz
 
| max res dp freq    = 60 Hz
Line 147: Line 147:
 
|sse42=Yes
 
|sse42=Yes
 
|sse4a=No
 
|sse4a=No
 +
|sse_gfni=No
 
|avx=No
 
|avx=No
 +
|avx_gfni=No
 
|avx2=No
 
|avx2=No
 
|avx512f=No
 
|avx512f=No
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|avx512vbmi=No
 
|avx512vbmi=No
 
|avx5124fmaps=No
 
|avx5124fmaps=No
 +
|avx512vnni=No
 
|avx5124vnniw=No
 
|avx5124vnniw=No
 
|avx512vpopcntdq=No
 
|avx512vpopcntdq=No
 +
|avx512gfni=No
 +
|avx512vaes=No
 +
|avx512vbmi2=No
 +
|avx512bitalg=No
 +
|avx512vpclmulqdq=No
 
|abm=No
 
|abm=No
 
|tbm=No
 
|tbm=No
Line 174: Line 182:
 
|clmul=Yes
 
|clmul=Yes
 
|f16c=Yes
 
|f16c=Yes
 +
|bfloat16=No
 
|tbt1=No
 
|tbt1=No
 
|tbt2=No
 
|tbt2=No
 
|tbmt3=No
 
|tbmt3=No
 +
|tvb=No
 
|bpt=No
 
|bpt=No
 
|eist=Yes
 
|eist=Yes
Line 186: Line 196:
 
|intelnode=No
 
|intelnode=No
 
|kpt=No
 
|kpt=No
 +
|tme=No
 +
|mktme=No
 
|ptt=No
 
|ptt=No
 
|intelrunsure=No
 
|intelrunsure=No
Line 207: Line 219:
 
|osguard=No
 
|osguard=No
 
|intqat=No
 
|intqat=No
 +
|dlboost=No
 
|3dnow=No
 
|3dnow=No
 
|e3dnow=No
 
|e3dnow=No
Line 220: Line 233:
 
|sensemi=No
 
|sensemi=No
 
|xfr=No
 
|xfr=No
 +
|xfr2=No
 
|mxfr=No
 
|mxfr=No
 
|amdpb=No
 
|amdpb=No
 
|amdpb2=No
 
|amdpb2=No
 +
|amdpbod=No
 
}}
 
}}

Latest revision as of 20:14, 2 August 2024

Edit Values
Pentium Silver J5005
gemini lake (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberJ5005
Part NumberFH8068003067415
S-SpecSR3S3
MarketDesktop
IntroductionDecember 11, 2017 (announced)
December 11, 2017 (launched)
Release Price$161.00
ShopAmazon
General Specs
FamilyPentium Silver
Series5000
LockedYes
Frequency1,500 MHz
Turbo Frequency2,800 MHz (1 core)
Clock multiplier15
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureGoldmont Plus
Core NameGemini Lake
Core SteppingB0
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads4
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP10 W
Packaging
PackageFCBGA-1090 (BGA)
Dimension25 mm x 24 mm
Contacts1090

Pentium Silver J5005 is a quad-core 64-bit x86 desktop microprocessor introduced by Intel in 2017. This processor is based on Goldmont Plus microarchitecture and is manufactured on a 14 nm process. The J5005 operates at 1.5 GHz with a burst frequency of 2.8 GHz and a TDP of 10 W. This MPU incorporates Intel's UHD Graphics 605 GPU operating at 250 MHz with a burst frequency of 800 MHz.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache[edit]

Main article: Goldmont Plus § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$96 KiB
98,304 B
0.0938 MiB
4x24 KiB6-way set associativewrite-back
L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  1x4 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2400
Supports ECCNo
Max Mem8 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 6
Configuration: 1x4+1x2, 4x1, 2x1+1x2+1x2


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUUHD Graphics 605
DesignerIntelDevice ID0x3184
Execution Units18Max Displays3
Max Memory8 GiB
8,192 MiB
8,388,608 KiB
8,589,934,592 B
Frequency250 MHz
0.25 GHz
250,000 KHz
Burst Frequency800 MHz
0.8 GHz
800,000 KHz
OutputDP, eDP, HDMI, DSI
Max Resolution
HDMI4096x2304 @60 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.4
HDMI2.0

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
SGXSoftware Guard Extensions
ISRTSmart Response Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/pentium_silver/j5005&oldid=102493"
Facts about "Pentium Silver J5005 - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Pentium Silver J5005 - Intel#package + and Pentium Silver J5005 - Intel#pcie +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
clock multiplier15 +
core count4 +
core nameGemini Lake +
core steppingB0 +
designerIntel +
device id0x3184 +
familyPentium Silver +
first announcedDecember 11, 2017 +
first launchedDecember 11, 2017 +
full page nameintel/pentium silver/j5005 +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Software Guard Extensions +, Smart Response Technology + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel smart response technology supporttrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuUHD Graphics 605 +
integrated gpu base frequency250 MHz (0.25 GHz, 250,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units18 +
integrated gpu max frequency800 MHz (0.8 GHz, 800,000 KHz) +
integrated gpu max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description6-way set associative +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description16-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateDecember 11, 2017 +
main imageFile:gemini lake (front).png +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
microarchitectureGoldmont Plus +
model numberJ5005 +
namePentium Silver J5005 +
packageFCBGA-1090 +
part numberFH8068003067415 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 161.00 (€ 144.90, £ 130.41, ¥ 16,636.13) +
s-specSR3S3 +
series5000 +
smp max ways1 +
supported memory typeDDR4-2400 +
tdp10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)2,800 MHz (2.8 GHz, 2,800,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has software guard extensionstrue +