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Difference between revisions of "amd/ryzen 9/5900x"
(Incorrectly said it was "hexadeca-core" when it clearly is 12-core.) |
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|designer=AMD | |designer=AMD | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
− | + | |model number=5900X | |
− | |model number= | ||
|part number=100-000000061 | |part number=100-000000061 | ||
|part number 2=100-100000061WOF | |part number 2=100-100000061WOF | ||
Line 12: | Line 11: | ||
|first announced=October 8, 2020 | |first announced=October 8, 2020 | ||
|first launched=November 5, 2020 | |first launched=November 5, 2020 | ||
− | |release price=$549 | + | |release price=$549 |
|family=Ryzen 9 | |family=Ryzen 9 | ||
|series=5000 | |series=5000 | ||
Line 22: | Line 21: | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Zen 3 | |microarch=Zen 3 | ||
+ | |platform=AM4 | ||
+ | |chipset=AMD300* Reliant on vendor update to AGESA 1.2.0.6b/c. | ||
+ | |chipset 2=AMD400 | ||
+ | |chipset 3=AMD500 | ||
|core name=Vermeer | |core name=Vermeer | ||
+ | |core family=25 | ||
+ | |core model=33 | ||
+ | |core stepping=2 | ||
|process=7 nm | |process=7 nm | ||
|process 2=12 nm | |process 2=12 nm | ||
− | |technology= | + | |transistors=8,300 million |
+ | |technology=FinFet | ||
+ | |die area=2x 74 mm²(CCD) + 125 mm² (IOD) | ||
|mcp=Yes | |mcp=Yes | ||
|die count=3 | |die count=3 | ||
Line 34: | Line 42: | ||
|max cpus=1 | |max cpus=1 | ||
|tdp=105 W | |tdp=105 W | ||
+ | |tcase min=0 °C | ||
+ | |tcase max=90 °C | ||
|package name 1=amd,socket_am4 | |package name 1=amd,socket_am4 | ||
}} | }} | ||
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{{main|amd/microarchitectures/zen 3#Memory_Hierarchy|l1=Zen 3 § Cache}} | {{main|amd/microarchitectures/zen 3#Memory_Hierarchy|l1=Zen 3 § Cache}} | ||
{{cache size | {{cache size | ||
− | |l1 cache=768 | + | |l1 cache=768 KiB |
|l1i cache=384 KiB | |l1i cache=384 KiB | ||
|l1i break=12x32 KiB | |l1i break=12x32 KiB | ||
Line 55: | Line 65: | ||
|l3 cache=64 MiB | |l3 cache=64 MiB | ||
|l3 break=2x32 MiB | |l3 break=2x32 MiB | ||
+ | |l3 desc=16-way set associative | ||
+ | |l3 policy=write-back | ||
}} | }} | ||
== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
− | |type=DDR4- | + | |type=DDR4-4000 |
− | |ecc= | + | |ecc=Yes |
|max mem=128 GiB | |max mem=128 GiB | ||
+ | |controllers=2 | ||
|channels=2 | |channels=2 | ||
|width=128 bit | |width=128 bit |
Latest revision as of 06:25, 21 July 2024
Edit Values | |
Ryzen 9 5900X | |
General Info | |
Designer | AMD |
Manufacturer | TSMC |
Model Number | 5900X |
Part Number | 100-000000061, 100-100000061WOF |
Market | Desktop |
Introduction | October 8, 2020 (announced) November 5, 2020 (launched) |
Release Price | $549 |
Shop | Amazon |
General Specs | |
Family | Ryzen 9 |
Series | 5000 |
Locked | No |
Frequency | 3,700 MHz |
Turbo Frequency | 4,800 MHz |
Clock multiplier | 37 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen 3 |
Platform | AM4 |
Chipset | AMD300* Reliant on vendor update to AGESA 1.2.0.6b/c., AMD400, AMD500 |
Core Name | Vermeer |
Core Family | 25 |
Core Model | 33 |
Core Stepping | 2 |
Process | 7 nm, 12 nm |
Transistors | 8,300 million |
Technology | FinFet |
Die | 2x 74 mm²(CCD) + 125 mm² (IOD) |
MCP | Yes (3 dies) |
Word Size | 64 bit |
Cores | 12 |
Threads | 24 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 105 W |
Tcase | 0 °C – 90 °C |
Packaging | |
Package | OPGA-1331 |
Package Type | Organic Micro Pin Grid Array |
Dimension | 40 mm × 40 mm |
Pitch | 1 mm |
Contacts | 1331 |
Socket | Socket AM4 |
Ryzen 9 5900X is a 64-bit dodeca-core high-end performance x86 desktop microprocessor introduced by AMD in late 2020. Fabricated on TSMC's 7 nm process based on the Zen 3 microarchitecture, this processor operates at 3.7 GHz with a TDP of 105 W and a Boost frequency of up to 4.8 GHz. The 5900X supports up to 128 GiB of dual-channel DDR4-3200 memory.
Cache[edit]
- Main article: Zen 3 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
In addition to the x4 lanes that are reserved for the chipset, the Ryzen 9 5900X has x16 for a discrete graphics processor and x4 for storage (NVMe or 2 ports SATA Express).
Expansion Options |
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Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Ryzen 9 5900X - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 9 5900X - AMD#pcie + |
base frequency | 3,700 MHz (3.7 GHz, 3,700,000 kHz) + |
chipset | AMD300* Reliant on vendor update to AGESA 1.2.0.6b/c. +, AMD400 + and AMD500 + |
clock multiplier | 37 + |
core count | 12 + |
core family | 25 + |
core model | 33 + |
core name | Vermeer + |
core stepping | 2 + |
designer | AMD + |
die count | 3 + |
family | Ryzen 9 + |
first announced | October 8, 2020 + |
first launched | November 5, 2020 + |
full page name | amd/ryzen 9/5900x + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd extended frequency range 2 | true + |
has amd precision boost 2 | true + |
has amd sensemi technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology +, Extended Frequency Range 2 + and Precision Boost 2 + |
has locked clock multiplier | false + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) + |
ldate | November 5, 2020 + |
manufacturer | TSMC + |
market segment | Desktop + |
max case temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max cpu count | 1 + |
max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
max memory bandwidth | 47.68 GiB/s (48,824.32 MiB/s, 51.196 GB/s, 51,196.01 MB/s, 0.0466 TiB/s, 0.0512 TB/s) + |
max memory channels | 2 + |
microarchitecture | Zen 3 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 5900X + |
name | Ryzen 9 5900X + |
package | OPGA-1331 + |
part number | 100-000000061 + and 100-100000061WOF + |
platform | AM4 + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) + |
release price | $ 549.00 (€ 494.10, £ 444.69, ¥ 56,728.17) + |
series | 5000 + |
smp max ways | 1 + |
socket | Socket AM4 + |
supported memory type | DDR4-4000 + |
tdp | 105 W (105,000 mW, 0.141 hp, 0.105 kW) + |
thread count | 24 + |
turbo frequency | 4,800 MHz (4.8 GHz, 4,800,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |