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Ryzen Threadripper 3980X is a 64-bit 48-core high-performance x86 desktop microprocessor introduced by AMD on February 7, 2020. The 3980X, which is based on their Zen 2 microarchitecture, is fabricated on TSMC's 7 nm process. The 3980X operates at a base frequency of 3.2 GHz with a TDP of 280 W and a boost of up to 4.5 GHz. This MPU supports up to 1 TiB of quad-channel DDR4-3200 memory. This chip is placed between the Ryzen Threadripper 3970x and the upcoming Ryzen Threadripper 3990x CPU's.
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{{amd title|Ryzen Threadripper 3980X}}
 +
{{chip
 +
|future=Yes
 +
|name=Ryzen Threadripper 3980X
 +
|no image=Yes
 +
|designer=AMD
 +
|manufacturer=TSMC
 +
|manufacturer 2=GlobalFoundries
 +
|model number=3980X
 +
|market=Desktop
 +
|family=Ryzen Threadripper
 +
|series=3900
 +
|locked=No
 +
|frequency=3,200 MHz
 +
|turbo frequency=4,500 MHz
 +
|clock multiplier=32
 +
|isa=x86-64
 +
|isa family=x86
 +
|microarch=Zen 2
 +
|chipset=TRX40
 +
|core name=Castle Peak
 +
|process=7 nm
 +
|process 2=12 nm
 +
|technology=CMOS
 +
|mcp=Yes
 +
|die count=9
 +
|word size=64 bit
 +
|core count=48
 +
|thread count=96
 +
|max memory=512 GiB
 +
|max cpus=1
 +
|tdp=280 W
 +
|package name 1=amd,socket strx4
 +
}}
 +
'''Ryzen Threadripper 3980X''' is a {{arch|64}} [[48-core]] high-performance [[x86]] desktop [[microprocessor]] expected to be introduced by [[AMD]] some time in 2020. The 3980X, which is based on their {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, is fabricated on [[TSMC]]'s [[7 nm process]]. The 3980X operates at a base frequency of 3.2 GHz with a [[TDP]] of 280 W and a {{amd|precision boost|boost}} of up to 4.5 GHz. This MPU supports up to 512 GiB of quad-channel DDR4-3200 memory.
  
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Full technical specifications will be uploaded when the CPU premiers on Feb 7th 2020.
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{{leaked info}}
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{{unknown features}}
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== Cache ==
 +
{{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}}
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{{cache size
 +
|l1 cache=3 MiB
 +
|l1i cache=1.5 MiB
 +
|l1i break=48x32 KiB
 +
|l1i desc=8-way set associative
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|l1d cache=1.5 MiB
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|l1d break=48x32 KiB
 +
|l1d desc=8-way set associative
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|l2 cache=24 MiB
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|l2 break=48x512 KiB
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|l2 desc=8-way set associative
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|l2 policy=write-back
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}}
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== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-3200
 +
|ecc=Yes
 +
|max mem=512 GiB
 +
|controllers=4
 +
|channels=4
 +
|max bandwidth=95.37 GiB/s
 +
|bandwidth schan=23.84 GiB/s
 +
|bandwidth dchan=47.68 GiB/s
 +
|bandwidth qchan=95.37 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=4.0
 +
|pcie lanes=64
 +
|pcie config=3x16+4x4
 +
}}
 +
}}
 +
 
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=Yes
 +
|sse_gfni=No
 +
|avx=Yes
 +
|avx_gfni=No
 +
|avx2=Yes
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx512vnni=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|avx512gfni=No
 +
|avx512vaes=No
 +
|avx512vbmi2=No
 +
|avx512bitalg=No
 +
|avx512vpclmulqdq=No
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=Yes
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|bfloat16=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|tvb=No
 +
|bpt=No
 +
|eist=No
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=No
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|dlboost=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=Yes
 +
|amdv=Yes
 +
|amdsme=No
 +
|amdtsme=Yes
 +
|amdsev=No
 +
|rvi=No
 +
|smt=Yes
 +
|sensemi=Yes
 +
|xfr=No
 +
|xfr2=No
 +
|mxfr=No
 +
|amdpb=No
 +
|amdpb2=Yes
 +
|amdpbod=No
 +
}}

Latest revision as of 05:36, 24 March 2023

Edit Values
Ryzen Threadripper 3980X
General Info
DesignerAMD
ManufacturerTSMC, GlobalFoundries
Model Number3980X
MarketDesktop
ShopAmazon
General Specs
FamilyRyzen Threadripper
Series3900
LockedNo
Frequency3,200 MHz
Turbo Frequency4,500 MHz
Clock multiplier32
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
ChipsetTRX40
Core NameCastle Peak
Process7 nm, 12 nm
TechnologyCMOS
MCPYes (9 dies)
Word Size64 bit
Cores48
Threads96
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP280 W
Packaging
PackagesTRX4, FCLGA-4094 (FC-OLGA)
Dimension75.4 mm × 58.5 mm × 6.26 mm
Pitch0.87 mm × 1 mm
Contacts4094
SocketsTRX4

Ryzen Threadripper 3980X is a 64-bit 48-core high-performance x86 desktop microprocessor expected to be introduced by AMD some time in 2020. The 3980X, which is based on their Zen 2 microarchitecture, is fabricated on TSMC's 7 nm process. The 3980X operates at a base frequency of 3.2 GHz with a TDP of 280 W and a boost of up to 4.5 GHz. This MPU supports up to 512 GiB of quad-channel DDR4-3200 memory.


Water drop.svg Leaked Info! Some of the information presented in this article is solely based on leaks that were published online or obtained directly by WikiChip. It goes without saying that this information could change, be incomplete, wrong, or even made up. It's highly advised to wait for an official product announcement.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache[edit]

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$3 MiB
3,072 KiB
3,145,728 B
L1I$1.5 MiB
1,536 KiB
1,572,864 B
48x32 KiB8-way set associative 
L1D$1.5 MiB
1,536 KiB
1,572,864 B
48x32 KiB8-way set associative 
L2$24 MiB
24,576 KiB
25,165,824 B
0.0234 GiB
  48x512 KiB8-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200
Supports ECCYes
Max Mem512 GiB
Controllers4
Channels4
Max Bandwidth95.37 GiB/s
97,658.88 MiB/s
102.403 GB/s
102,402.758 MB/s
0.0931 TiB/s
0.102 TB/s
Bandwidth
Single 23.84 GiB/s
Double 47.68 GiB/s
Quad 95.37 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 4.0
Max Lanes: 64
Configuration: 3x16+4x4


Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
TSMETransparent SME
SenseMISenseMI Technology
Boost 2Precision Boost 2
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/ryzen_threadripper/3980x&oldid=101414"
Facts about "Ryzen Threadripper 3980X - AMD"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Ryzen Threadripper 3980X - AMD#pcie +
base frequency3,200 MHz (3.2 GHz, 3,200,000 kHz) +
chipsetTRX40 +
clock multiplier32 +
core count48 +
core nameCastle Peak +
designerAMD +
die count9 +
familyRyzen Threadripper +
full page nameamd/ryzen threadripper/3980x +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd precision boost 2true +
has amd sensemi technologytrue +
has amd transparent secure memory encryption technologytrue +
has ecc memory supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost 2 +
has locked clock multiplierfalse +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size3,072 KiB (3,145,728 B, 3 MiB) +
l1d$ description8-way set associative +
l1d$ size1,536 KiB (1,572,864 B, 1.5 MiB) +
l1i$ description8-way set associative +
l1i$ size1,536 KiB (1,572,864 B, 1.5 MiB) +
l2$ description8-way set associative +
l2$ size24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
ldate3000 +
manufacturerTSMC + and GlobalFoundries +
market segmentDesktop +
max cpu count1 +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
max memory bandwidth95.37 GiB/s (97,658.88 MiB/s, 102.403 GB/s, 102,402.758 MB/s, 0.0931 TiB/s, 0.102 TB/s) +
max memory channels4 +
microarchitectureZen 2 +
model number3980X +
nameRyzen Threadripper 3980X +
packagesTRX4 + and FCLGA-4094 +
process7 nm (0.007 μm, 7.0e-6 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) +
series3900 +
smp max ways1 +
socketsTRX4 +
supported memory typeDDR4-3200 +
tdp280 W (280,000 mW, 0.375 hp, 0.28 kW) +
technologyCMOS +
thread count96 +
turbo frequency4,500 MHz (4.5 GHz, 4,500,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +