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Difference between revisions of "amd/epyc/7451"
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{{amd title|EPYC 7451}} | {{amd title|EPYC 7451}} | ||
− | {{ | + | {{chip |
− | |||
|name=EPYC 7451 | |name=EPYC 7451 | ||
|no image=Yes | |no image=Yes | ||
Line 7: | Line 6: | ||
|manufacturer=GlobalFoundries | |manufacturer=GlobalFoundries | ||
|model number=7451 | |model number=7451 | ||
+ | |part number=PS7451BDVHCAF | ||
|market=Server | |market=Server | ||
|first announced=June 20, 2017 | |first announced=June 20, 2017 | ||
+ | |first launched=June 20, 2017 | ||
+ | |release price=$2,400 | ||
|family=EPYC | |family=EPYC | ||
|series=7000 | |series=7000 | ||
Line 15: | Line 17: | ||
|turbo frequency1=3,200 MHz | |turbo frequency1=3,200 MHz | ||
|turbo frequency2=3,200 MHz | |turbo frequency2=3,200 MHz | ||
− | |turbo frequency3= | + | |turbo frequency3=3,200 MHz |
− | |turbo frequency4= | + | |turbo frequency4=3,200 MHz |
− | |turbo frequency5= | + | |turbo frequency5=3,200 MHz |
− | |turbo frequency6= | + | |turbo frequency6=3,200 MHz |
− | |turbo frequency7= | + | |turbo frequency7=3,200 MHz |
− | |turbo frequency8= | + | |turbo frequency8=3,200 MHz |
− | |turbo frequency9= | + | |turbo frequency9=3,200 MHz |
− | |turbo frequency10= | + | |turbo frequency10=3,200 MHz |
− | |turbo frequency11= | + | |turbo frequency11=3,200 MHz |
− | |turbo frequency12= | + | |turbo frequency12=3,200 MHz |
|turbo frequency13=2,900 MHz | |turbo frequency13=2,900 MHz | ||
|turbo frequency14=2,900 MHz | |turbo frequency14=2,900 MHz | ||
Line 37: | Line 39: | ||
|turbo frequency23=2,900 MHz | |turbo frequency23=2,900 MHz | ||
|turbo frequency24=2,900 MHz | |turbo frequency24=2,900 MHz | ||
− | |||
− | |||
|clock multiplier=23 | |clock multiplier=23 | ||
|isa=x86-64 | |isa=x86-64 | ||
Line 44: | Line 44: | ||
|microarch=Zen | |microarch=Zen | ||
|core name=Naples | |core name=Naples | ||
+ | |core family=23 | ||
+ | |core model=1 | ||
+ | |core stepping=B2 | ||
|process=14 nm | |process=14 nm | ||
|transistors=19,200,000,000 | |transistors=19,200,000,000 | ||
|technology=CMOS | |technology=CMOS | ||
− | |die area= | + | |die area=213 mm² |
− | |||
− | |||
|mcp=Yes | |mcp=Yes | ||
|die count=4 | |die count=4 | ||
Line 58: | Line 59: | ||
|max memory=2 TiB | |max memory=2 TiB | ||
|tdp=180 W | |tdp=180 W | ||
− | |package | + | |tcase min=0 °C |
+ | |tcase max=81 °C | ||
+ | |package name 1=amd,socket_sp3 | ||
}} | }} | ||
− | '''EPYC 7451''' is a dual-socket {{arch|64}} [[24-core]] [[x86]] enterprise server microprocessor introduced by [[AMD]] in mid-[[2017]]. This processor is based on the {{amd|Zen|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. The 7451 has a base frequency of 2.3 GHz with a turbo frequency of 3.2 GHz for | + | '''EPYC 7451''' is a dual-socket {{arch|64}} [[24-core]] [[x86]] enterprise server microprocessor introduced by [[AMD]] in mid-[[2017]]. This processor is based on the {{amd|Zen|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. The 7451 has a base frequency of 2.3 GHz with a turbo frequency of 3.2 GHz for up to 12 active cores. This chip has a TDP of 180 W and supports up to 2 TiB of octa-channel DDR4-2666 ECC memory per socket. |
Line 91: | Line 94: | ||
|ecc=Yes | |ecc=Yes | ||
|max mem=2 TiB | |max mem=2 TiB | ||
− | |controllers= | + | |controllers=8 |
|channels=8 | |channels=8 | ||
|max bandwidth=158.95 GiB/s | |max bandwidth=158.95 GiB/s | ||
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|bandwidth hchan=119.21 GiB/s | |bandwidth hchan=119.21 GiB/s | ||
}} | }} | ||
+ | |||
+ | In a dual-socket configuration, the maximum supported memory doubles to 4 TiB along with the maximum theoretical bandwidth of 317.9 GiB/s. | ||
== Expansions == | == Expansions == | ||
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|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | + | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No | ||
Line 185: | Line 190: | ||
|amdvi=Yes | |amdvi=Yes | ||
|amdv=Yes | |amdv=Yes | ||
+ | |amdsme=Yes | ||
+ | |amdtsme=Yes | ||
+ | |amdsev=Yes | ||
|rvi=No | |rvi=No | ||
|smt=Yes | |smt=Yes |
Latest revision as of 11:30, 18 March 2023
Edit Values | |
EPYC 7451 | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 7451 |
Part Number | PS7451BDVHCAF |
Market | Server |
Introduction | June 20, 2017 (announced) June 20, 2017 (launched) |
Release Price | $2,400 |
Shop | Amazon |
General Specs | |
Family | EPYC |
Series | 7000 |
Locked | No |
Frequency | 2,300 MHz |
Turbo Frequency | 3,200 MHz (1 core), 3,200 MHz (2 cores), 3,200 MHz (3 cores), 3,200 MHz (4 cores), 3,200 MHz (5 cores), 3,200 MHz (6 cores), 3,200 MHz (7 cores), 3,200 MHz (8 cores), 3,200 MHz (9 cores), 3,200 MHz (10 cores), 3,200 MHz (11 cores), 3,200 MHz (12 cores), 2,900 MHz (13 cores), 2,900 MHz (14 cores), 2,900 MHz (15 cores), 2,900 MHz (16 cores), 2,900 MHz (17 cores), 2,900 MHz (18 cores), 2,900 MHz (19 cores), 2,900 MHz (20 cores), 2,900 MHz (21 cores), 2,900 MHz (22 cores), 2,900 MHz (23 cores), 2,900 MHz (24 cores) |
Clock multiplier | 23 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen |
Core Name | Naples |
Core Family | 23 |
Core Model | 1 |
Core Stepping | B2 |
Process | 14 nm |
Transistors | 19,200,000,000 |
Technology | CMOS |
Die | 213 mm² |
MCP | Yes (4 dies) |
Word Size | 64 bit |
Cores | 24 |
Threads | 48 |
Max Memory | 2 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
TDP | 180 W |
Tcase | 0 °C – 81 °C |
Packaging | |
Package | SP3, FCLGA-4094 (FC-OLGA) |
Dimension | 75.4 mm × 58.5 mm × 6.26 mm |
Pitch | 0.87 mm × 1 mm |
Contacts | 4094 |
Socket | SP3, LGA-4094 |
EPYC 7451 is a dual-socket 64-bit 24-core x86 enterprise server microprocessor introduced by AMD in mid-2017. This processor is based on the Zen microarchitecture and is manufactured on a 14 nm process. The 7451 has a base frequency of 2.3 GHz with a turbo frequency of 3.2 GHz for up to 12 active cores. This chip has a TDP of 180 W and supports up to 2 TiB of octa-channel DDR4-2666 ECC memory per socket.
Contents
Cache[edit]
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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In a dual-socket configuration, the maximum supported memory doubles to 4 TiB along with the maximum theoretical bandwidth of 317.9 GiB/s.
Expansions[edit]
The EPYC 7401P has 128 Gen 3 PCIe lanes.
Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
Facts about "EPYC 7451 - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC 7451 - AMD#io + |
base frequency | 2,300 MHz (2.3 GHz, 2,300,000 kHz) + |
clock multiplier | 23 + |
core count | 24 + |
core family | 23 + |
core model | 1 + |
core name | Naples + |
core stepping | B2 + |
designer | AMD + |
die area | 213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) + |
die count | 4 + |
family | EPYC + |
first announced | June 20, 2017 + |
first launched | June 20, 2017 + |
full page name | amd/epyc/7451 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd secure encrypted virtualization technology | true + |
has amd secure memory encryption technology | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology + |
has locked clock multiplier | false + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 2,304 KiB (2,359,296 B, 2.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) + |
ldate | June 20, 2017 + |
manufacturer | GlobalFoundries + |
market segment | Server + |
max case temperature | 354.15 K (81 °C, 177.8 °F, 637.47 °R) + |
max cpu count | 2 + |
max memory | 2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) + |
max memory bandwidth | 158.95 GiB/s (162,764.8 MiB/s, 170.671 GB/s, 170,671.263 MB/s, 0.155 TiB/s, 0.171 TB/s) + |
max memory channels | 8 + |
max pcie lanes | 128 + |
microarchitecture | Zen + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 7451 + |
name | EPYC 7451 + |
package | SP3 + and FCLGA-4094 + |
part number | PS7451BDVHCAF + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 2,400.00 (€ 2,160.00, £ 1,944.00, ¥ 247,992.00) + |
series | 7000 + |
smp max ways | 2 + |
socket | SP3 + and LGA-4094 + |
supported memory type | DDR4-2666 + |
tdp | 180 W (180,000 mW, 0.241 hp, 0.18 kW) + |
technology | CMOS + |
thread count | 48 + |
transistor count | 19,200,000,000 + |
turbo frequency (10 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (11 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (12 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (13 cores) | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
turbo frequency (14 cores) | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
turbo frequency (15 cores) | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
turbo frequency (16 cores) | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
turbo frequency (17 cores) | 2,900 MHz + |
turbo frequency (18 cores) | 2,900 MHz + |
turbo frequency (19 cores) | 2,900 MHz + |
turbo frequency (1 core) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (20 cores) | 2,900 MHz + |
turbo frequency (21 cores) | 2,900 MHz + |
turbo frequency (22 cores) | 2,900 MHz + |
turbo frequency (23 cores) | 2,900 MHz + |
turbo frequency (24 cores) | 2,900 MHz + |
turbo frequency (2 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (3 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (4 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (5 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (6 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (7 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (8 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (9 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |