Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/microarchitectures/sierra forest"
m |
m (Expanded page by adding new instructions and architectural information) |
||
| Line 22: | Line 22: | ||
== Process Technology == | == Process Technology == | ||
Emerald rapids is planned to be manufactured on the Intel 3 process. | Emerald rapids is planned to be manufactured on the Intel 3 process. | ||
| + | |||
| + | |||
| + | === CPUID === | ||
| + | {| class="wikitable tc1 tc2 tc3 tc4" | ||
| + | ! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model | ||
| + | |- | ||
| + | | rowspan="2" | SP || 0 || 0x6 || 0x8 || AxF | ||
| + | |- | ||
| + | | colspan="4" | Family 6 Model 0 | ||
| + | |} | ||
| + | |||
| + | == Architecture == | ||
| + | === Key changes from {{\\|Sapphire Rapids|Saphire Rapids}}=== | ||
| + | * [[Intel 3]] (from [[Intel 7]]) | ||
| + | * Core | ||
| + | ** {{\\|Golden Cove}} '''→''' {{\\|Crestmont}} | ||
| + | |||
| + | ====New instructions ==== | ||
| + | Sierra Forest is set to introduce new instructions {{x86|extensions|new instructions}}: | ||
| + | |||
| + | * {{x86|CMPCCXADD|<code>CMPCCXADD</code>}} - Compare and Add if Condition is Met | ||
| + | * {{x86|AVX-IFMA|<code>AVX IFMA</code>}} - Integer Fused Multiply Add | ||
| + | * {{x86|AVX-VNNI-INT8|<code>AVX VNNI INT8</code>}} - AVX Vector Neural Network Instructions INT8 | ||
| + | * {{x86|LASS|<code>AVX VNNI INT8</code>}} - Linear Address Space Separation | ||
| + | |||
| + | |||
| + | {{expand list}} | ||
| + | |||
| + | == See also == | ||
| + | * {{\\|Crestmont}} | ||
Revision as of 18:16, 23 February 2023
| Edit Values | |
| Sierra Forest µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2024 |
| Process | Intel 3 |
| Instructions | |
| ISA | x86-64 |
| Succession | |
| Contemporary | |
| Granite Rapids | |
Sierra Forest (SFR) is a new Atom based architecture for servers, built on Intel's 3 nm node.
Contents
History
Sierra Forest was announced at the 2022 Intel Investor Meeting, it is a new microarchitecture that will day view alongside Granite Rapids in 2023.
Process Technology
Emerald rapids is planned to be manufactured on the Intel 3 process.
CPUID
| Core | Extended Family |
Family | Extended Model |
Model |
|---|---|---|---|---|
| SP | 0 | 0x6 | 0x8 | AxF |
| Family 6 Model 0 | ||||
Architecture
Key changes from Saphire Rapids
New instructions
Sierra Forest is set to introduce new instructions new instructions:
-
CMPCCXADD- Compare and Add if Condition is Met -
AVX IFMA- Integer Fused Multiply Add -
AVX VNNI INT8- AVX Vector Neural Network Instructions INT8 -
AVX VNNI INT8- Linear Address Space Separation
This list is incomplete; you can help by expanding it.
See also
Facts about "Sierra Forest - Microarchitectures - Intel"
| codename | Sierra Forest + |
| designer | Intel + |
| first launched | 2024 + |
| full page name | intel/microarchitectures/sierra forest + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Sierra Forest + |