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Difference between revisions of "intel/xeon platinum/8173m"
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{{intel title|Xeon Platinum 8173M}} | {{intel title|Xeon Platinum 8173M}} | ||
− | {{ | + | {{chip |
− | | future | + | |future=Yes |
− | | name | + | |name=Xeon Platinum 8173M |
− | | | + | |image=skylake sp (basic).png |
− | | | + | |designer=Intel |
− | | | + | |manufacturer=Intel |
− | | | + | |model number=8173M |
− | | | + | |market=Server |
− | | | + | |family=Xeon Platinum |
− | | | + | |series=8000 |
− | | | + | |frequency=2,100 MHz |
− | | | + | |turbo frequency1=3,800 |
− | | | + | |turbo frequency=Yes |
− | | | + | |clock multiplier=21 |
− | | | + | |isa=x86-64 |
− | | | + | |isa family=x86 |
− | | | + | |microarch=Skylake (server) |
− | | | + | |platform=Purley |
− | | | + | |chipset=Lewisburg |
− | | | + | |core name=Skylake SP |
− | | | + | |core family=6 |
+ | |process=14 nm | ||
+ | |technology=CMOS | ||
+ | |word size=64 bit | ||
+ | |core count=28 | ||
+ | |thread count=56 | ||
+ | |max cpus=8 | ||
+ | |max memory=1,536 GiB | ||
+ | |package name 1=intel,fclga_3647 | ||
+ | }} | ||
+ | '''Xeon Platinum 8173M''' is a {{arch|64}} [[28-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in 2017. This chip supports up to 8-way multiprocessing. The Platinum 8173M, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 205 W and a {{intel|turbo boost}} frequency of up to 3,8 GHz, supports up 1.5 TiB GiB of hexa-channel DDR4-2666 ECC memory. | ||
− | + | As indicated by the ''M'' suffix, this specific model supports double the memory capacity for up to 1.5 TiB per socket. | |
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− | + | {{unknown features}} | |
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== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/ | + | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}} |
{{cache size | {{cache size | ||
|l1 cache=1.75 MiB | |l1 cache=1.75 MiB | ||
Line 138: | Line 63: | ||
|type=DDR4-2666 | |type=DDR4-2666 | ||
|ecc=Yes | |ecc=Yes | ||
− | |max mem= | + | |max mem=1,536 GiB |
− | |controllers= | + | |controllers=2 |
|channels=6 | |channels=6 | ||
|max bandwidth=119.21 GiB/s | |max bandwidth=119.21 GiB/s | ||
− | |bandwidth schan=19. | + | |bandwidth schan=19.87 GiB/s |
− | |bandwidth dchan=39. | + | |bandwidth dchan=39.74 GiB/s |
|bandwidth qchan=79.47 GiB/s | |bandwidth qchan=79.47 GiB/s | ||
|bandwidth hchan=119.21 GiB/s | |bandwidth hchan=119.21 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 48 | ||
+ | | pcie config = x16 | ||
+ | | pcie config 2 = x8 | ||
+ | | pcie config 3 = x4 | ||
}} | }} | ||
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|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | | | + | |avx512f=Yes |
+ | |avx512cd=Yes | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=Yes | ||
+ | |avx512dq=Yes | ||
+ | |avx512vl=Yes | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No | ||
Line 184: | Line 129: | ||
|f16c=Yes | |f16c=Yes | ||
|tbt1=No | |tbt1=No | ||
− | |tbt2= | + | |tbt2=Yes |
|tbmt3=No | |tbmt3=No | ||
|bpt=No | |bpt=No | ||
|eist=Yes | |eist=Yes | ||
− | |sst= | + | |sst=Yes |
|flex=No | |flex=No | ||
|fastmem=No | |fastmem=No | ||
+ | |ivmd=Yes | ||
+ | |intelnodecontroller=Yes | ||
+ | |intelnode=Yes | ||
+ | |kpt=Yes | ||
+ | |ptt=Yes | ||
+ | |intelrunsure=Yes | ||
+ | |mbe=Yes | ||
|isrt=No | |isrt=No | ||
|sba=No | |sba=No | ||
Line 198: | Line 150: | ||
|ipt=No | |ipt=No | ||
|tsx=Yes | |tsx=Yes | ||
− | |txt= | + | |txt=Yes |
|ht=Yes | |ht=Yes | ||
|vpro=Yes | |vpro=Yes | ||
Line 204: | Line 156: | ||
|vtd=Yes | |vtd=Yes | ||
|ept=Yes | |ept=Yes | ||
− | |mpx= | + | |mpx=No |
|sgx=No | |sgx=No | ||
|securekey=No | |securekey=No | ||
− | |osguard= | + | |osguard=No |
|3dnow=No | |3dnow=No | ||
|e3dnow=No | |e3dnow=No | ||
Line 214: | Line 166: | ||
|amdvi=No | |amdvi=No | ||
|amdv=No | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
|rvi=No | |rvi=No | ||
|smt=No | |smt=No | ||
Line 219: | Line 174: | ||
|xfr=No | |xfr=No | ||
}} | }} | ||
+ | |||
+ | [[Category:microprocessor models by intel based on skylake extreme core count die]] |
Latest revision as of 04:25, 7 November 2022
Edit Values | |
Xeon Platinum 8173M | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 8173M |
Market | Server |
Shop | Amazon |
General Specs | |
Family | Xeon Platinum |
Series | 8000 |
Frequency | 2,100 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,800 (1 core) |
Clock multiplier | 21 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Skylake SP |
Core Family | 6 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 28 |
Threads | 56 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 8-Way (Multiprocessor) |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Xeon Platinum 8173M is a 64-bit 28-core x86 multi-socket highest performance server microprocessor introduced by Intel in 2017. This chip supports up to 8-way multiprocessing. The Platinum 8173M, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 205 W and a turbo boost frequency of up to 3,8 GHz, supports up 1.5 TiB GiB of hexa-channel DDR4-2666 ECC memory.
As indicated by the M suffix, this specific model supports double the memory capacity for up to 1.5 TiB per socket.
Contents
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Xeon Platinum 8173M - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8173M - Intel#io + |
base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
chipset | Lewisburg + |
clock multiplier | 21 + |
core count | 28 + |
core family | 6 + |
core name | Skylake SP + |
designer | Intel + |
family | Xeon Platinum + |
full page name | intel/xeon platinum/8173m + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,792 KiB (1,835,008 B, 1.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 896 KiB (917,504 B, 0.875 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 896 KiB (917,504 B, 0.875 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 28 MiB (28,672 KiB, 29,360,128 B, 0.0273 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 38.5 MiB (39,424 KiB, 40,370,176 B, 0.0376 GiB) + |
ldate | 3000 + |
main image | + |
manufacturer | Intel + |
market segment | Server + |
max cpu count | 8 + |
max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
microarchitecture | Skylake (server) + |
model number | 8173M + |
name | Xeon Platinum 8173M + |
package | FCLGA-3647 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 8000 + |
smp max ways | 8 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2666 + |
technology | CMOS + |
thread count | 56 + |
turbo frequency (1 core) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |