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Date | Name | Thumbnail | Size | User | Description | Versions |
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23:56, 5 October 2017 | nehalem-sandy bridge overview change.svg (file) | 24 KB | David | General system architecture change from {{intel|Nehalem|l=arch}} to {{intel|Sandy Bridge|l=arch}}. | 1 | |
23:56, 5 October 2017 | penryn-nehalem overview change.svg (file) | 18 KB | David | General system architecture change from {{intel|Penryn|l=arch}} to {{intel|Nehalem|l=arch}}. | 1 | |
16:34, 5 October 2017 | skylake pin diagram.png (file) | 1.57 MB | Nible | 3 | ||
16:25, 5 October 2017 | coffee lake pin diagram.png (file) | 4.31 MB | Nible | 2 | ||
16:21, 3 October 2017 | kaby vs coffee pinout.png (file) | 933 KB | David | Intel {{intel|Kaby Lake|l=arch}} vs {{intel|Coffee Lake|l=arch}} pinout comparison. | 1 | |
21:55, 2 October 2017 | coffee lake s (back).png (file) | 376 KB | David | Intel {{intel|Coffee Lake S|l=core}}, back. Image by Intel. | 1 | |
19:09, 1 October 2017 | ss 14-10nm.png (file) | 390 KB | David | Samsung Foundry Forum 2017 Japan - Samsung 14nm through 11 nm and 10 nm. | 1 | |
03:39, 1 October 2017 | xtor infobox finfet.gif (file) | 6.82 MB | David | 3 | ||
02:18, 1 October 2017 | xtor infobox finfet3.gif (file) | 1.48 MB | David | 2 | ||
15:28, 28 September 2017 | 6 core hp gt2 coffeelake.svg (file) | 29 KB | Nible | Six core high performance GT2 die | 1 | |
15:27, 28 September 2017 | 4 core lp gt2 kabylake.svg (file) | 21 KB | Nible | Quad core low performance GT4 die | 1 | |
15:26, 28 September 2017 | 4 core hp gt4 skylake.svg (file) | 25 KB | Nible | 3 | ||
15:26, 28 September 2017 | 4 core hp gt2 skylake.svg (file) | 21 KB | Nible | 2 | ||
15:26, 28 September 2017 | dual core hp gt2 skylake.svg (file) | 17 KB | Nible | 3 | ||
15:25, 28 September 2017 | 2 core lp gt3 skylake.svg (file) | 19 KB | Nible | 2 | ||
15:25, 28 September 2017 | 2 core lp gt2 skylake.svg (file) | 17 KB | Nible | 2 | ||
12:43, 28 September 2017 | quad to hexa mainstream die areas.svg (file) | 30 KB | David | 2 | ||
20:17, 26 September 2017 | 8th-gen-intel-core-product-brief.pdf (file) | 308 KB | At32Hz | Intel 8th generation core ({{intel|Coffee Lake|l=arch}}) product brief. | 1 | |
20:17, 26 September 2017 | 8th-gen-intel-core-overview.pdf (file) | Error creating thumbnail: convert: no decode delegate for this image format `' @ error/constitute.c/ReadImage/501. convert: no images defined `/tmp/transform_b46a85527d1c.jpg' @ error/convert.c/ConvertImageCommand/3241. |
2.1 MB | At32Hz | Intel 8th generation core ({{intel|Coffee Lake|l=arch}}) overview. | 1 |
23:30, 25 September 2017 | coffee lake soc block diagram.svg (file) | 34 KB | At32Hz | My drawing of {{intel|Coffee Lake|l=arch}} SOC in a block diagram. | 1 | |
21:42, 25 September 2017 | core to coffee die evolution.svg (file) | 57 KB | David | title alignmnet | 2 | |
17:07, 25 September 2017 | coffee lake overview.svg (file) | 43 KB | David | Intel {{intel|Coffee Lake|l=arch}} overview. | 1 | |
05:21, 25 September 2017 | skylake lcc die shot.jpg (file) | 746 KB | Nible | intel skylake 10 core die shot. by Nible | 1 | |
02:53, 25 September 2017 | coffee lake 6c sa.png (file) | 1.33 MB | At32Hz | Intel {{intel|Coffee Lake|l=arch}} System Agent. * Annotated Version: File:coffee_lake_6c_sa_(annotated).png | 1 | |
02:33, 25 September 2017 | coffee lake gpu (annotated).png (file) | 3.11 MB | At32Hz | pfft | 2 | |
02:31, 25 September 2017 | coffee lake gpu.png (file) | 3.52 MB | At32Hz | Image of Intel's {{intel|Coffee Lake|l=arch}} GPU. * Annotated: File:coffee_lake_gpu_(annotated).png | 1 | |
02:12, 25 September 2017 | coffee lake die (hexa core) (annotated).png (file) | 7.65 MB | At32Hz | Annotated version of Intel's {{intel|Coffee Lake|l=arch}} die shot. * Original File:coffee lake die (hexa core).png | 1 | |
01:12, 25 September 2017 | coffee lake wafer.png (file) | 27.21 MB | At32Hz | Intel {{intel|Coffee Lake|l=arch}} wafer. Image by Intel. | 1 | |
00:49, 25 September 2017 | coffee lake s.png (file) | 769 KB | At32Hz | Intel {{intel|Coffee Lake S|l=core}} chip. Image by Intel. | 1 | |
00:49, 25 September 2017 | coffee lake s (front).png (file) | 242 KB | At32Hz | Intel {{intel|Coffee Lake S|l=core}}, front. Image by Intel. | 1 | |
00:37, 25 September 2017 | coffee lake die (hexa core).png (file) | 9.38 MB | At32Hz | Intel {{intel|Coffee Lake|l=arch}} hexa-core die by Intel. | 1 | |
15:45, 24 September 2017 | tsmc 16nm.jpg (file) | 44 KB | David | TSMC 16 nm transistors | 1 | |
08:11, 24 September 2017 | zen uma.png (file) | 1.41 MB | At32Hz | AMD {{amd|Zen|l=arch}} UMA mode. | 1 | |
08:11, 24 September 2017 | zen numa.png (file) | 1.4 MB | At32Hz | AMD {{amd|Zen|l=arch}} NUMA mode. | 1 | |
07:29, 24 September 2017 | amd if data fabric.png (file) | 1.59 MB | At32Hz | AMD {{amd|Infinity Fabric}} Data Fabric | 1 | |
07:17, 24 September 2017 | threadripper top 5 percent of dies.png (file) | 174 KB | At32Hz | AMD {{amd|Ryzen Threadripper}} is top 5% of dies. | 1 | |
07:08, 24 September 2017 | zen-4zep.svg (file) | 83 KB | At32Hz | AMD {{amd|Zen|l=arch}} 4-{{amd|Zen#Modules (Zeppelin)|Zeppelin|l=arch}} Config. | 1 | |
07:08, 24 September 2017 | zen-2zep.svg (file) | 44 KB | At32Hz | AMD {{amd|Zen|l=arch}} 2-{{amd|Zen#Modules (Zeppelin)|Zeppelin|l=arch}} Config. | 1 | |
07:08, 24 September 2017 | zen-1zep.svg (file) | 21 KB | At32Hz | AMD {{amd|Zen|l=arch}} 1-{{amd|Zen#Modules (Zeppelin)|Zeppelin|l=arch}} Config. | 1 | |
06:24, 24 September 2017 | x399 platform.png (file) | 1.25 MB | At32Hz | AMD {{amd|Threadripper}} (x399) platform | 1 | |
06:00, 24 September 2017 | AMD Threadripper SoC.svg (file) | 362 KB | At32Hz | AMD {{amd|Zen|l=arch}}-based {{amd|Threadripper}} SoC block diagram | 1 | |
05:48, 24 September 2017 | AMD Summit Ridge SoC.svg (file) | 171 KB | At32Hz | changed old mem in favor of a light-weight one | 2 | |
05:46, 24 September 2017 | AMD Naples SoC.svg (file) | 449 KB | At32Hz | rm prev mem image in favor of a light-weight one | 3 | |
00:20, 23 September 2017 | sandy bridge ring scalability.svg (file) | 13 KB | David | minor correction to where the ring goes. | 2 | |
13:28, 22 September 2017 | sandy bridge register file shared strength and post silicon tuning.png (file) | 168 KB | David | A technique used in Intel's {{intel|Sandy Bridge|l=arch}} in order to reduce the minimum voltage required. Tuning also includes three resistors for post-silicon tuning. | 1 | |
13:18, 22 September 2017 | sandy bridge vcc min improvements.png (file) | 74 KB | David | Improvements done to lower the Vcc Min of the L3 in Intel's {{intel|Sandy Bridge}} | 1 | |
01:36, 21 September 2017 | scorpio engine rb-mem subsys.svg (file) | 80 KB | At32Hz | 2 | ||
00:25, 21 September 2017 | scorpio engine block diagram.png (file) | 216 KB | At32Hz | {{microsoft|Scorpio Engine|l=arch}} Block Diagram by Microsoft. | 1 | |
10:30, 19 September 2017 | oracle logo.svg (file) | 6 KB | At32Hz | Oracle logo | 1 | |
00:31, 15 September 2017 | scorpio engine die shot (annotated).png (file) | 1.06 MB | David | annotated version of the AMD {{amd|Scorpio Engine|l=arch}} for the {{microsoft|Scorpio Engine}} chip. * Original version: File:scorpio engine die shot.png | 1 |
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