Semiconductor & Computer Engineering
From WikiChip
Information for "xiaomi/surge/s2"
Basic information
| Display title | Surge S2 - Xiaomi |
| Default sort key | Surge S2, Xiaomi |
| Page length (in bytes) | 3,490 |
| Page ID | 16998 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 4 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 14:26, 3 March 2017 |
| Latest editor | 119.153.141.7 (talk) |
| Date of latest edit | 14:24, 5 September 2018 |
| Total number of edits | 8 |
| Total number of distinct authors | 4 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (13) | Templates used on this page:
|
Facts about "Surge S2 - Xiaomi"
| bus type | AXI + |
| core count | 8 + |
| core name | Cortex-A53 + and Cortex-A73 + |
| designer | Xiaomi + and ARM Holdings + |
| family | Surge + |
| first announced | February 28, 2017 + |
| full page name | xiaomi/surge/s2 + |
| instance of | microprocessor + |
| integrated gpu | Mali-G71 + |
| integrated gpu base frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
| integrated gpu designer | ARM Holdings + |
| integrated gpu execution units | 12 + |
| isa | ARMv8 + |
| isa family | ARM + |
| ldate | 3000 + |
| manufacturer | TSMC + |
| market segment | Mobile + |
| microarchitecture | Cortex-A53 + and Cortex-A73 + |
| model number | S2 + |
| name | Xiaomi Surge S2 + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |
| technology | CMOS + |
| thread count | 8 + |