Semiconductor & Computer Engineering
From WikiChip
Information for "samsung/microarchitectures/m4"
Basic information
| Display title | Exynos M4 - Microarchitectures - Samsung |
| Default sort key | Exynos M4, Samsung |
| Page length (in bytes) | 4,952 |
| Page ID | 30276 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 7 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 11:27, 9 June 2018 |
| Latest editor | QuietRub (talk | contribs) |
| Date of latest edit | 13:43, 16 March 2023 |
| Total number of edits | 33 |
| Total number of distinct authors | 8 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (15) | Templates used on this page:
|
Facts about "Exynos M4 - Microarchitectures - Samsung"
| codename | Cheetah + |
| core count | 4 + |
| designer | Samsung + |
| first launched | 2019 + |
| full page name | samsung/microarchitectures/m4 + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8.2 + |
| manufacturer | Samsung + |
| microarchitecture type | CPU + |
| name | Cheetah + |
| pipeline stages | 16 + |
| process | 8 nm (0.008 μm, 8.0e-6 mm) + |