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Information for "qualcomm/msm6xxx/msm6200"

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Display titleMSM6200 - Qualcomm
Default sort keyqualcomm/msm6xxx/msm6200
Page length (in bytes)3,934
Page ID11417
Page content languageEnglish (en)
Page content modelwikitext
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Number of redirects to this page4
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Page creatorDavid (talk | contribs)
Date of page creation14:58, 20 November 2016
Latest editorChippyBot (talk | contribs)
Date of latest edit16:31, 13 December 2017
Total number of edits16
Total number of distinct authors3
Recent number of edits (within past 90 days)0
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Facts about "MSM6200 - Qualcomm"
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base frequency40 MHz (0.04 GHz, 40,000 kHz) +
bus typeAMBA 2 +
chipsetMSM6xxx +
core count1 +
core nameARM7TDMI +
designerQualcomm + and ARM Holdings +
dspQDSP4000 +
dsp base frequency40 MHz (0.04 GHz, 40,000 kHz) +
familyMSM6xxx +
first announcedMarch 20, 2001 +
first launchedAugust 2002 +
full page namequalcomm/msm6xxx/msm6200 +
has 2g supporttrue +
has 3g supporttrue +
has gprs supporttrue +
has gsm supporttrue +
has locked clock multipliertrue +
has umts supporttrue +
has wcdma supporttrue +
instance ofmicroprocessor +
l1i$ descriptionNo L1$ +
l1i$ size0 KiB (0 B, 0 MiB) +
ldateAugust 2002 +
main imageFile:msm6200 hires.jpg +
manufacturerTSMC + and IBM +
market segmentMobile + and Embedded +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory address0xFFFFFFFF +
microarchitectureARM7 +
model numberMSM6200 +
nameQualcomm MSM6200 +
part ofValue Platform +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesMSM +
smp max ways1 +
technologyCMOS +
thread count1 +