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Information for "qualcomm/microarchitectures/falkor"
Basic information
| Display title | Falkor - Microarchitectures - Qualcomm |
| Default sort key | qualcomm/microarchitectures/falkor |
| Page length (in bytes) | 6,536 |
| Page ID | 16780 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 6 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 08:24, 7 February 2017 |
| Latest editor | 78.82.251.111 (talk) |
| Date of latest edit | 13:01, 19 May 2021 |
| Total number of edits | 25 |
| Total number of distinct authors | 4 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (16) | Templates used on this page:
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Facts about "Falkor - Microarchitectures - Qualcomm"
| codename | Falkor + |
| core count | 40 +, 46 + and 48 + |
| designer | Qualcomm + |
| first launched | November 8, 2017 + |
| full page name | qualcomm/microarchitectures/falkor + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8 + |
| manufacturer | Samsung + |
| microarchitecture type | CPU + |
| name | Falkor + |
| pipeline stages (max) | 15 + |
| pipeline stages (min) | 10 + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |