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Display titleXeon Silver 4214Y - Intel
Default sort keyXeon Silver 4214Y, Intel
Page length (in bytes)4,669
Page ID32884
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page9
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Page creatorDavid (talk | contribs)
Date of page creation15:09, 19 February 2019
Latest editorDavid (talk | contribs)
Date of latest edit12:16, 29 December 2019
Total number of edits16
Total number of distinct authors3
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

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Retrieved from "https://en.wikichip.org/wiki/intel/xeon_silver/4214y"
Facts about "Xeon Silver 4214Y - Intel"
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Xeon Silver 4214Y - Intel#io +
base frequency2,200 MHz (2.2 GHz, 2,200,000 kHz) +
chipsetLewisburg +
clock multiplier22 +
core count10 +
core family6 +
core nameCascade Lake SP +
designerIntel +
familyXeon Silver +
first announced2019 +
first launched2019 +
full page nameintel/xeon silver/4214y +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel speed shift technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size768 KiB (786,432 B, 0.75 MiB) +
l1d$ description8-way set associative +
l1d$ size384 KiB (393,216 B, 0.375 MiB) +
l1i$ description8-way set associative +
l1i$ size384 KiB (393,216 B, 0.375 MiB) +
l2$ description16-way set associative +
l2$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
l3$ description11-way set associative +
l3$ size16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) +
ldate3000 +
main imageFile:skylake sp (basic).png +
manufacturerIntel +
market segmentServer +
max case temperature351.15 K (78 °C, 172.4 °F, 632.07 °R) +
max cpu count2 +
max memory bandwidth107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) +
max memory channels6 +
max pcie lanes48 +
microarchitectureCascade Lake +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number4214M +
nameXeon Silver 4214M +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
series4000 +
smp max ways2 +
supported memory typeDDR4-2400 +
technologyCMOS +
thread count20 +
word size64 bit (8 octets, 16 nibbles) +