Information for "intel/xeon silver/4114"

From WikiChip

Basic information

Display title	Xeon Silver 4114 - Intel
Default sort key	Xeon Silver 4114, Intel
Page length (in bytes)	7,055
Page ID	20969
Page content language	English (en)
Page content model	wikitext
Indexing by robots	Allowed
Number of redirects to this page	9
Counted as a content page	Yes
Number of subpages of this page	0 (0 redirects; 0 non-redirects)

Page protection

Edit	Allow all users (infinite)
Move	Allow all users (infinite)

Edit history

Page creator	David (talk \| contribs)
Date of page creation	14:25, 11 July 2017
Latest editor	David (talk \| contribs)
Date of latest edit	11:16, 29 December 2019
Total number of edits	24
Total number of distinct authors	4
Recent number of edits (within past 90 days)	0
Recent number of distinct authors	0

Page properties

Transcluded templates (23)	Templates used on this page: Template:arch (view source) (protected) Template:benchmark entry (edit) Template:benchmarks main (edit) Template:cache size (view source) (protected) Template:chip (view source) (protected) Template:expansions (edit) Template:frequency table (edit) Template:intel (view source) (protected) Template:intel title (view source) (protected) Template:istrue (view source) (protected) Template:link-intel (view source) (protected) Template:link-x86 (view source) (protected) Template:main (view source) (protected) Template:memory controller (edit) Template:see also (edit) Template:url parse anchor (view source) (protected) Template:url parse article (view source) (protected) Template:x86 (view source) (protected) Template:x86 features (view source) (protected) Module:benchmarks (view source) Module:chip (view source) Module:frequency table (view source) Module:packaging data (view source)

Retrieved from "https://en.wikichip.org/wiki/intel/xeon_silver/4114"

Facts about "Xeon Silver 4114 - Intel"

RDF feed

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon Silver 4114 - Intel#io +, Xeon Silver 4114 - Intel +, Xeon Silver 4114 - Intel +, Xeon Silver 4114 - Intel +, Xeon Silver 4114 - Intel +, Xeon Silver 4114 - Intel +, Xeon Silver 4114 - Intel +, Xeon Silver 4114 - Intel + and Xeon Silver 4114 - Intel +
base frequency	2,200 MHz (2.2 GHz, 2,200,000 kHz) +
chipset	Lewisburg +
clock multiplier	22 +
core count	10 +
core family	6 +
core name	Skylake SP +
core stepping	U0 +
cpuid	0x50654 +
designer	Intel +
family	Xeon Silver +
first announced	July 11, 2017 +
first launched	July 11, 2017 +
full page name	intel/xeon silver/4114 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technology	true +
has intel speed shift technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	640 KiB (655,360 B, 0.625 MiB) +
l1d$ description	8-way set associative +
l1d$ size	320 KiB (327,680 B, 0.313 MiB) +
l1i$ description	8-way set associative +
l1i$ size	320 KiB (327,680 B, 0.313 MiB) +
l2$ description	16-way set associative +
l2$ size	10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) +
l3$ description	11-way set associative +
l3$ size	13.75 MiB (14,080 KiB, 14,417,920 B, 0.0134 GiB) +
ldate	July 11, 2017 +
main image	+
manufacturer	Intel +
market segment	Server +
max case temperature	351.15 K (78 °C, 172.4 °F, 632.07 °R) +
max cpu count	2 +
max dts temperature	89 °C +
max memory	786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) +
max memory bandwidth	107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) +
max memory channels	6 +
max pcie lanes	48 +
microarchitecture	Skylake (server) +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min dts temperature	0 °C +
model number	4114 +
name	Xeon Silver 4114 +
package	FCLGA-3647 +
part number	BX806734114 + and CD8067303561800 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 694.00 (€ 624.60, £ 562.14, ¥ 71,711.02) +
s-spec	SR3GK +
s-spec (qs)	QN0B +
series	4000 +
smp interconnect	UPI +
smp interconnect links	2 +
smp interconnect rate	9.6 GT/s +
smp max ways	2 +
socket	Socket P + and LGA-3647 +
supported memory type	DDR4-2400 +
tdp	85 W (85,000 mW, 0.114 hp, 0.085 kW) +
technology	CMOS +
thread count	20 +
turbo frequency (1 core)	3,000 MHz (3 GHz, 3,000,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Basic information

Page protection

Edit history

Page properties