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Information for "intel/xeon platinum/8256"
Basic information
| Display title | Xeon Platinum 8256 - Intel |
| Default sort key | Xeon Platinum 8256, Intel |
| Page length (in bytes) | 4,191 |
| Page ID | 33077 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 10 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 15:05, 3 April 2019 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 01:38, 29 December 2019 |
| Total number of edits | 10 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (22) | Templates used on this page:
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Facts about "Xeon Platinum 8256 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8256 - Intel#pcie + |
| base frequency | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
| chipset | Lewisburg + |
| clock multiplier | 38 + |
| core count | 4 + |
| core family | 6 + |
| core name | Cascade Lake SP + |
| core stepping | B0 + and B1 + |
| cpuid | 0x50655 + |
| designer | Intel + |
| family | Xeon Platinum + |
| first announced | April 2, 2019 + |
| first launched | April 2, 2019 + |
| full page name | intel/xeon platinum/8256 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost + |
| has intel deep learning boost | true + |
| has intel enhanced speedstep technology | true + |
| has intel speed shift technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) + |
| ldate | April 2, 2019 + |
| main image | |
| manufacturer | Intel + |
| market segment | Server + |
| max cpu count | 8 + |
| max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
| max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
| max memory channels | 6 + |
| microarchitecture | Cascade Lake + |
| model number | 8256 + |
| name | Xeon Platinum 8256 + |
| number of avx-512 execution units | 2 + |
| package | FCLGA-3647 + |
| part number | CD8069504194701 + and BX806958256 + |
| platform | Purley + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 7,007.00 (€ 6,306.30, £ 5,675.67, ¥ 724,033.31) + and $ 7,014.00 (€ 6,312.60, £ 5,681.34, ¥ 724,756.62) + |
| release price (box) | $ 7,014.00 (€ 6,312.60, £ 5,681.34, ¥ 724,756.62) + |
| release price (tray) | $ 7,007.00 (€ 6,306.30, £ 5,675.67, ¥ 724,033.31) + |
| s-spec | SRF94 + |
| s-spec (qs) | QRAP + |
| series | 8200 + |
| smp interconnect | UPI + |
| smp interconnect links | 3 + |
| smp interconnect rate | 10.4 GT/s + |
| smp max ways | 8 + |
| socket | Socket P + and LGA-3647 + |
| supported memory type | DDR4-2933 + |
| tdp | 105 W (105,000 mW, 0.141 hp, 0.105 kW) + |
| technology | CMOS + |
| thread count | 8 + |
| turbo frequency (1 core) | 3,900 MHz (3.9 GHz, 3,900,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |