From WikiChip
Information for "intel/xeon gold/6226r"
Basic information
| Display title | Xeon Gold 6226R - Intel |
| Default sort key | Xeon Gold 6226R, Intel |
| Page length (in bytes) | 3,658 |
| Page ID | 35938 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 22:45, 27 February 2020 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 02:33, 28 February 2020 |
| Total number of edits | 8 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (19) | Templates used on this page:
|
Facts about "Xeon Gold 6226R - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Gold 6226R - Intel#pcie + |
| base frequency | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
| bus links | 4 + |
| bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
| bus type | DMI 3.0 + |
| chipset | Lewisburg + |
| clock multiplier | 29 + |
| core count | 16 + |
| core family | 6 + |
| core model | 85 + |
| core name | Cascade Lake R + |
| designer | Intel + |
| family | Xeon Gold + |
| first announced | February 24, 2020 + |
| first launched | February 24, 2020 + |
| full page name | intel/xeon gold/6226r + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost + |
| has intel deep learning boost | true + |
| has intel enhanced speedstep technology | true + |
| has intel speed shift technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 22 MiB (22,528 KiB, 23,068,672 B, 0.0215 GiB) + |
| ldate | February 24, 2020 + |
| main image | |
| manufacturer | Intel + |
| market segment | Server + |
| max case temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
| max cpu count | 2 + |
| max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
| max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
| max memory channels | 6 + |
| microarchitecture | Cascade Lake + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| model number | 6226R + |
| name | Xeon Gold 6226R + |
| number of avx-512 execution units | 1 + |
| package | FCLGA-3647 + |
| platform | Purley + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 1,300.00 (€ 1,170.00, £ 1,053.00, ¥ 134,329.00) + and $ 1,306.00 (€ 1,175.40, £ 1,057.86, ¥ 134,948.98) + |
| release price (box) | $ 1,306.00 (€ 1,175.40, £ 1,057.86, ¥ 134,948.98) + |
| release price (tray) | $ 1,300.00 (€ 1,170.00, £ 1,053.00, ¥ 134,329.00) + |
| series | 6200 + |
| smp interconnect | UPI + |
| smp interconnect links | 2 + |
| smp interconnect rate | 10.4 GT/s + |
| smp max ways | 2 + |
| socket | Socket P + and LGA-3647 + |
| supported memory type | DDR4-2933 + |
| tdp | 150 W (150,000 mW, 0.201 hp, 0.15 kW) + |
| technology | CMOS + |
| thread count | 32 + |
| turbo frequency (1 core) | 3,900 MHz (3.9 GHz, 3,900,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |