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Information for "intel/xeon e7"
Basic information
| Display title | Xeon E7 - Intel |
| Default sort key | Xeon E7, Intel |
| Page length (in bytes) | 8,635 |
| Page ID | 9450 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 5 |
| Counted as a content page | Yes |
| Number of subpages of this page | 20 (0 redirects; 20 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 00:50, 12 June 2016 |
| Latest editor | 95.24.54.109 (talk) |
| Date of latest edit | 14:18, 16 April 2025 |
| Total number of edits | 18 |
| Total number of distinct authors | 5 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (17) | Templates used on this page:
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Facts about "Xeon E7 - Intel"
| designer | Intel + |
| first announced | April 5, 2011 + |
| first launched | April 5, 2011 + |
| full page name | intel/xeon e7 + |
| instance of | microprocessor family + |
| instruction set architecture | x86-64 + |
| main designer | Intel + |
| manufacturer | Intel + |
| microarchitecture | Westmere +, Ivy Bridge +, Haswell + and Broadwell + |
| name | Intel Xeon E7 + |
| package | FCLGA-8 + |
| process | 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
| socket | LGA-1567 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |