-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Information for "intel/microarchitectures/spring hill"
Basic information
Display title | intel/microarchitectures/spring hill |
Default sort key | intel/microarchitectures/spring hill |
Page length (in bytes) | 8,825 |
Page ID | 35466 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 3 |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 15:10, 15 October 2019 |
Latest editor | David (talk | contribs) |
Date of latest edit | 07:41, 26 March 2020 |
Total number of edits | 30 |
Total number of distinct authors | 4 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Retrieved from "https://en.wikichip.org/wiki/intel/microarchitectures/spring_hill"
Facts about "Spring Hill - Microarchitectures - Intel"
codename | Spring Hill + |
core count | 2 + |
designer | Intel + |
first launched | May 2019 + |
full page name | intel/microarchitectures/spring hill + |
instance of | microarchitecture + |
manufacturer | Intel + |
name | Spring Hill + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |
processing element count | 10 +, 12 + and 8 + |