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Information for "intel/microarchitectures/p6"
Basic information
| Display title | P6 - Microarchitectures - Intel |
| Default sort key | P6, Intel |
| Page length (in bytes) | 2,709 |
| Page ID | 6775 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 7 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | At32Hz (talk | contribs) |
| Date of page creation | 22:10, 14 April 2016 |
| Latest editor | 76.109.45.241 (talk) |
| Date of latest edit | 20:34, 22 February 2020 |
| Total number of edits | 18 |
| Total number of distinct authors | 7 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (10) | Templates used on this page:
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Facts about "P6 - Microarchitectures - Intel"
| codename | P6 + |
| designer | Intel + |
| first launched | October 1995 + |
| full page name | intel/microarchitectures/p6 + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | P6 + |
| phase-out | December 2000 + |
| process | 350 nm (0.35 μm, 3.5e-4 mm) + and 250 nm (0.25 μm, 2.5e-4 mm) + |