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Information for "intel/celeron"
Basic information
Display title | Celeron - Intel |
Default sort key | Celeron, Intel |
Page length (in bytes) | 25,141 |
Page ID | 6626 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 6 |
Counted as a content page | Yes |
Number of subpages of this page | 75 (0 redirects; 75 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | At32Hz (talk | contribs) |
Date of page creation | 17:53, 10 April 2016 |
Latest editor | 49.145.142.39 (talk) |
Date of latest edit | 02:13, 22 September 2018 |
Total number of edits | 38 |
Total number of distinct authors | 6 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
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Facts about "Celeron - Intel"
designer | Intel + |
first announced | April 1998 + |
full page name | intel/celeron + |
instance of | microprocessor family + |
instruction set architecture | IA-32 + and x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | P6 +, NetBurst +, Core +, Penryn +, Nehalem +, Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell +, Airmont +, Goldmont +, Skylake +, Coffee Lake + and Kaby Lake + |
name | Intel Celeron + |
package | FCBGA1170 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) +, 180 nm (0.18 μm, 1.8e-4 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | BGA1170 + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |