Information for "hisilicon/kirin/710"

Basic information

Display title	Kirin 710 - HiSilicon
Default sort key	Kirin 710, HiSilicon
Page length (in bytes)	2,462
Page ID	30811
Page content language	English (en)
Page content model	wikitext
Indexing by robots	Allowed
Number of redirects to this page	2
Counted as a content page	Yes
Number of subpages of this page	0 (0 redirects; 0 non-redirects)

Edit	Allow all users (infinite)
Move	Allow all users (infinite)

Page creator	At32Hz (talk \| contribs)
Date of page creation	12:12, 19 July 2018
Latest editor	88.242.67.222 (talk)
Date of latest edit	22:31, 11 August 2024
Total number of edits	51
Total number of distinct authors	33
Recent number of edits (within past 90 days)	0
Recent number of distinct authors	0

Transcluded templates (13)	Templates used on this page: Template:arch (view source) (protected) Template:armh (edit) Template:chip (view source) (protected) Template:expand list (edit) Template:hisil title (edit) Template:hisilicon title (edit) Template:integrated graphics (edit) Template:istrue (view source) (protected) Template:link-armh (edit) Template:memory controller (edit) Template:url parse anchor (view source) (protected) Template:url parse article (view source) (protected) Module:chip (view source)

base frequency	2,200 MHz (2.2 GHz, 2,200,000 kHz) + and 1,700 MHz (1.7 GHz, 1,700,000 kHz) +
core count	8 +
core name	Cortex-A53 + and Cortex-A73 +
designer	HiSilicon + and ARM Holdings +
family	Kirin +
first announced	July 19, 2018 +
first launched	July 19, 2018 +
full page name	hisilicon/kirin/710 +
has ecc memory support	false +
instance of	microprocessor +
integrated gpu	Mali-G51 +
integrated gpu designer	ARM Holdings +
integrated gpu execution units	4 +
isa	ARMv8 +
isa family	ARM +
ldate	July 19, 2018 +
manufacturer	TSMC +
market segment	Mobile +
max cpu count	1 +
max memory	6,144 MiB (6,291,456 KiB, 6,442,450,944 B, 6 GiB, 0.00586 TiB) +
max memory channels	2 +
microarchitecture	Cortex-A53 + and Cortex-A73 +
model number	710 +
name	Kirin 710 +
process	12 nm (0.012 μm, 1.2e-5 mm) +
series	700 +
smp max ways	1 +
supported memory type	LPDDR3 + and LPDDR4 +
technology	CMOS +
thread count	8 +
used by	Huawei nova 3i +, Huawei Mate 20 Lite +, Huawei Honor 8X +, Huawei Y9 2019 +, Huawei P Smart Plus +, Huawei P Smart 2019 +, Huawei Honor 10 lite +, Huawei P30 lite (Huawei nova 4e) +, Huawei Honor 20 lite +, Huawei Y9 prime 2019 +, Honor Play 3 +, Huawei P Smart Z +, Huawei Honor 20e +, Huawei nova 5i +, Huawei enjoy 9s +, honor pad 5 +, Huawei P30 Lite +, Huawei y8s + and Huawei P40 lite E +
word size	64 bit (8 octets, 16 nibbles) +