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Information for "dec/microarchitectures/alpha 21264"
Basic information
Display title | Alpha 21264 - Microarchitectures - DEC |
Default sort key | dec/microarchitectures/alpha 21264 |
Page length (in bytes) | 1,895 |
Page ID | 18481 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 5 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 21:03, 8 June 2017 |
Latest editor | ChipIt (talk | contribs) |
Date of latest edit | 06:59, 13 June 2017 |
Total number of edits | 10 |
Total number of distinct authors | 2 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (9) | Templates used on this page:
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Facts about "Alpha 21264 - Microarchitectures - DEC"
codename | Alpha 21264 + |
core count | 1 + |
designer | DEC + |
first launched | February 1998 + |
full page name | dec/microarchitectures/alpha 21264 + |
instance of | microarchitecture + |
instruction set architecture | Alpha + |
manufacturer | DEC + and Intel + |
microarchitecture type | CPU + |
name | Alpha 21264 + |
pipeline stages | 6 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) + |