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Information for "centaur/microarchitectures/cha"
Basic information
| Display title | CHA - Microarchitectures - Centaur Technology |
| Default sort key | CHA, Centaur |
| Page length (in bytes) | 24,888 |
| Page ID | 35762 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 17:59, 21 January 2020 |
| Latest editor | 37.76.61.244 (talk) |
| Date of latest edit | 03:37, 30 September 2022 |
| Total number of edits | 61 |
| Total number of distinct authors | 4 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (17) | Templates used on this page:
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Facts about "CHA - Microarchitectures - Centaur Technology"
| codename | CHA + |
| core count | 8 + |
| designer | Centaur Technology + |
| full page name | centaur/microarchitectures/cha + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | CHA + |
| pipeline stages (max) | 22 + |
| pipeline stages (min) | 20 + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + |